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authorSolomon Peachy <pizza@shaftnet.org>2020-01-01 23:06:11 -0500
committerSolomon Peachy <pizza@shaftnet.org>2020-01-01 23:06:11 -0500
commit45c1b42b60747c5de797ea322c80ea821a75e8fa (patch)
tree133edb3677fe2bc704a934f25c6a2799a10e3f54
parentc18c061c2f422d3fa1589e7d40aca62e23963e1d (diff)
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CMSIS: Update to CMSIS 5.0.6 and CMSIS-DSP 1.5.1
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c318
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c346
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c248
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c302
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c288
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c284
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c256
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c258
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c274
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c306
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c336
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c296
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c308
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c242
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c280
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c273
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c246
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c238
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c319
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c260
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c258
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c326
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c312
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c466
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c286
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c484
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c394
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c428
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c288
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c280
-rw-r--r--libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c250
-rw-r--r--libs/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c49427
-rw-r--r--libs/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c535
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c353
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c310
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c349
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c394
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c366
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c362
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c318
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c294
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c358
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c419
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c284
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c310
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c403
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c374
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c640
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c438
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c394
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c434
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c161
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c232
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c202
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c118
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c116
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c118
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c293
-rw-r--r--libs/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c232
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c253
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c180
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c180
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c262
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c164
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c162
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c299
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c295
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c208
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c1110
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c837
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c559
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c597
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c206
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c210
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c209
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c809
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c797
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c1193
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c1193
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c191
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c191
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c1353
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c191
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c1282
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c1074
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c2808
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c1142
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c1078
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c858
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c1347
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c1524
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c2986
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c1231
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c1518
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c1594
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c1581
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c1223
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c1491
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c1456
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c1118
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c1368
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c1466
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c1012
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c2626
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c1212
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c1014
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c916
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c1426
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c1318
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c1568
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c1036
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c1184
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c690
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c222
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c226
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c222
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c1380
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c610
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c1982
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c678
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c598
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c296
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c176
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c1150
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c230
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c1004
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c996
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c1000
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c694
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c782
-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c877
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c872
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c920
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c404
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c555
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-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c268
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c292
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c287
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c394
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c369
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c355
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c385
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c367
-rw-r--r--libs/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c356
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c258
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c216
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c234
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c218
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c256
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c228
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c230
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c224
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c396
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c410
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c394
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c256
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c300
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c296
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c250
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c278
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c260
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c250
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c302
-rw-r--r--libs/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c272
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c472
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal2.S427
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c1252
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q15.c702
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c516
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c957
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c397
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c366
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c361
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c1471
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c689
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c2419
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c317
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c292
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c284
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c3834
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c2793
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c669
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c910
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c33032
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c8564
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c16050
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c776
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c778
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c647
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c674
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c280
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c12649
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c4464
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c8565
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c865
-rw-r--r--libs/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c579
-rw-r--r--libs/CMSIS/DSP_Lib/license.txt56
-rw-r--r--libs/CMSIS/Device/ST/STM32F0xx/Release_Notes.html2
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Include/stm32f10x.h16776
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Include/system_stm32f10x.h208
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Release_Notes.html662
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_cl.s958
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_hd.s950
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_hd_vl.s914
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_ld.s706
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_ld_vl.s796
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_md.s738
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_md_vl.s828
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/startup_stm32f10x_xl.s946
-rw-r--r--libs/CMSIS/Device/ST/STM32F10x/Source/system_stm32f10x.c2200
-rw-r--r--libs/CMSIS/Device/ST/STM32F30x/Release_Notes.html2
-rw-r--r--libs/CMSIS/Device/ST/STM32F4xx/Release_Notes.html2
-rw-r--r--libs/CMSIS/Device/ST/STM32L1xx/Release_Notes.html2
-rw-r--r--libs/CMSIS/Include/arm_common_tables.h123
-rw-r--r--libs/CMSIS/Include/arm_const_structs.h67
-rw-r--r--libs/CMSIS/Include/arm_math.h4215
-rw-r--r--libs/CMSIS/Include/cmsis_armcc.h865
-rw-r--r--libs/CMSIS/Include/cmsis_armclang.h1869
-rw-r--r--libs/CMSIS/Include/cmsis_compiler.h266
-rw-r--r--libs/CMSIS/Include/cmsis_gcc.h2085
-rw-r--r--libs/CMSIS/Include/cmsis_iccarm.h935
-rw-r--r--libs/CMSIS/Include/cmsis_version.h39
-rw-r--r--libs/CMSIS/Include/core_armv8mbl.h1918
-rw-r--r--libs/CMSIS/Include/core_armv8mml.h2927
-rw-r--r--libs/CMSIS/Include/core_cm0.h894
-rw-r--r--libs/CMSIS/Include/core_cm0plus.h1013
-rw-r--r--libs/CMSIS/Include/core_cm1.h976
-rw-r--r--libs/CMSIS/Include/core_cm23.h1993
-rw-r--r--libs/CMSIS/Include/core_cm3.h1891
-rw-r--r--libs/CMSIS/Include/core_cm33.h3002
-rw-r--r--libs/CMSIS/Include/core_cm4.h2071
-rw-r--r--libs/CMSIS/Include/core_cm7.h2678
-rw-r--r--libs/CMSIS/Include/core_sc000.h970
-rw-r--r--libs/CMSIS/Include/core_sc300.h1871
-rw-r--r--libs/CMSIS/Include/mpu_armv7.h270
-rw-r--r--libs/CMSIS/Include/mpu_armv8.h333
-rw-r--r--libs/CMSIS/Include/tz_context.h70
-rw-r--r--libs/math.mk3
314 files changed, 176816 insertions, 170191 deletions
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
index 73888d1..f88ef95 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
@@ -1,165 +1,153 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_abs_f32.c
-*
-* Description: Vector absolute value.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include <math.h>
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup BasicAbs Vector Absolute Value
- *
- * Computes the absolute value of a vector on an element-by-element basis.
- *
- * <pre>
- * pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup BasicAbs
- * @{
- */
-
-/**
- * @brief Floating-point vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
-void arm_abs_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Calculate absolute and then store the results in the destination buffer. */
- /* read sample from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
-
- /* find absolute value */
- in1 = fabsf(in1);
-
- /* read sample from source */
- in4 = *(pSrc + 3);
-
- /* find absolute value */
- in2 = fabsf(in2);
-
- /* read sample from source */
- *pDst = in1;
-
- /* find absolute value */
- in3 = fabsf(in3);
-
- /* find absolute value */
- in4 = fabsf(in4);
-
- /* store result to destination */
- *(pDst + 1) = in2;
-
- /* store result to destination */
- *(pDst + 2) = in3;
-
- /* store result to destination */
- *(pDst + 3) = in4;
-
-
- /* Update source pointer to process next sampels */
- pSrc += 4u;
-
- /* Update destination pointer to process next sampels */
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Calculate absolute and then store the results in the destination buffer. */
- *pDst++ = fabsf(*pSrc++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_abs_f32.c
+ * Description: Floating-point vector absolute value
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include <math.h>
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup BasicAbs Vector Absolute Value
+ *
+ * Computes the absolute value of a vector on an element-by-element basis.
+ *
+ * <pre>
+ * pDst[n] = abs(pSrc[n]), 0 <= n < blockSize.
+ * </pre>
+ *
+ * The functions support in-place computation allowing the source and
+ * destination pointers to reference the same memory buffer.
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup BasicAbs
+ * @{
+ */
+
+/**
+ * @brief Floating-point vector absolute value.
+ * @param[in] *pSrc points to the input buffer
+ * @param[out] *pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ */
+
+void arm_abs_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t in1, in2, in3, in4; /* temporary variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Calculate absolute and then store the results in the destination buffer. */
+ /* read sample from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+
+ /* find absolute value */
+ in1 = fabsf(in1);
+
+ /* read sample from source */
+ in4 = *(pSrc + 3);
+
+ /* find absolute value */
+ in2 = fabsf(in2);
+
+ /* read sample from source */
+ *pDst = in1;
+
+ /* find absolute value */
+ in3 = fabsf(in3);
+
+ /* find absolute value */
+ in4 = fabsf(in4);
+
+ /* store result to destination */
+ *(pDst + 1) = in2;
+
+ /* store result to destination */
+ *(pDst + 2) = in3;
+
+ /* store result to destination */
+ *(pDst + 3) = in4;
+
+
+ /* Update source pointer to process next sampels */
+ pSrc += 4U;
+
+ /* Update destination pointer to process next sampels */
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Calculate absolute and then store the results in the destination buffer. */
+ *pDst++ = fabsf(*pSrc++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicAbs group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
index 5453c56..ec47fff 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
@@ -1,179 +1,167 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_abs_q15.c
-*
-* Description: Q15 vector absolute value.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAbs
- * @{
- */
-
-/**
- * @brief Q15 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
- */
-
-void arm_abs_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
- __SIMD32_TYPE *simd;
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t in1; /* Input value1 */
- q15_t in2; /* Input value2 */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- simd = __SIMD32_CONST(pDst);
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Read two inputs */
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-
- /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
-#ifndef ARM_MATH_BIG_ENDIAN
- *simd++ =
- __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
- ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
-#else
-
-
- *simd++ =
- __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
- ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *simd++ =
- __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
- ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
-#else
-
-
- *simd++ =
- __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
- ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- pDst = (q15_t *)simd;
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Read the input */
- in1 = *pSrc++;
-
- /* Calculate absolute value of input and then store the result in the destination buffer. */
- *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- q15_t in; /* Temporary input variable */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Read the input */
- in = *pSrc++;
-
- /* Calculate absolute value of input and then store the result in the destination buffer. */
- *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_abs_q15.c
+ * Description: Q15 vector absolute value
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAbs
+ * @{
+ */
+
+/**
+ * @brief Q15 vector absolute value.
+ * @param[in] *pSrc points to the input buffer
+ * @param[out] *pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+void arm_abs_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+ __SIMD32_TYPE *simd;
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ q15_t in1; /* Input value1 */
+ q15_t in2; /* Input value2 */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ simd = __SIMD32_CONST(pDst);
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Read two inputs */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+
+ /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
+#ifndef ARM_MATH_BIG_ENDIAN
+ *simd++ =
+ __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
+ ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
+
+#else
+
+
+ *simd++ =
+ __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
+ ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *simd++ =
+ __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
+ ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
+
+#else
+
+
+ *simd++ =
+ __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
+ ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ pDst = (q15_t *)simd;
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Read the input */
+ in1 = *pSrc++;
+
+ /* Calculate absolute value of input and then store the result in the destination buffer. */
+ *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ q15_t in; /* Temporary input variable */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Read the input */
+ in = *pSrc++;
+
+ /* Calculate absolute value of input and then store the result in the destination buffer. */
+ *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of BasicAbs group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
index 078011e..2733f51 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
@@ -1,130 +1,118 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_abs_q31.c
-*
-* Description: Q31 vector absolute value.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAbs
- * @{
- */
-
-
-/**
- * @brief Q31 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
- */
-
-void arm_abs_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- q31_t in; /* Input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1);
- *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2);
- *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3);
- *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-}
-
-/**
- * @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_abs_q31.c
+ * Description: Q31 vector absolute value
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAbs
+ * @{
+ */
+
+
+/**
+ * @brief Q31 vector absolute value.
+ * @param[in] *pSrc points to the input buffer
+ * @param[out] *pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+void arm_abs_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ q31_t in; /* Input value */
+
+#if defined (ARM_MATH_DSP)
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t in1, in2, in3, in4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
+
+ *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1);
+ *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2);
+ *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3);
+ *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
+ in = *pSrc++;
+ *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+}
+
+/**
+ * @} end of BasicAbs group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
index 0dbea57..d0acbfc 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
@@ -1,157 +1,145 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_abs_q7.c
-*
-* Description: Q7 vector absolute value.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAbs
- * @{
- */
-
-/**
- * @brief Q7 vector absolute value.
- * @param[in] *pSrc points to the input buffer
- * @param[out] *pDst points to the output buffer
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
- */
-
-void arm_abs_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- q7_t in; /* Input value1 */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Read inputs */
- in1 = (q31_t) * pSrc;
- in2 = (q31_t) * (pSrc + 1);
- in3 = (q31_t) * (pSrc + 2);
-
- /* find absolute value */
- out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
-
- /* read input */
- in4 = (q31_t) * (pSrc + 3);
-
- /* find absolute value */
- out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
-
- /* store result to destination */
- *pDst = (q7_t) out1;
-
- /* find absolute value */
- out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
-
- /* find absolute value */
- out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
-
- /* store result to destination */
- *(pDst + 1) = (q7_t) out2;
-
- /* store result to destination */
- *(pDst + 2) = (q7_t) out3;
-
- /* store result to destination */
- *(pDst + 3) = (q7_t) out4;
-
- /* update pointers to process next samples */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-#else
-
- /* Run the below code for Cortex-M0 */
- blkCnt = blockSize;
-
-#endif // #define ARM_MATH_CM0_FAMILY
-
- while(blkCnt > 0u)
- {
- /* C = |A| */
- /* Read the input */
- in = *pSrc++;
-
- /* Store the Absolute result in the destination buffer */
- *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_abs_q7.c
+ * Description: Q7 vector absolute value
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAbs
+ * @{
+ */
+
+/**
+ * @brief Q7 vector absolute value.
+ * @param[in] *pSrc points to the input buffer
+ * @param[out] *pDst points to the output buffer
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * \par Conditions for optimum performance
+ * Input and output buffers should be aligned by 32-bit
+ *
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ */
+
+void arm_abs_q7(
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ q7_t in; /* Input value1 */
+
+#if defined (ARM_MATH_DSP)
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t in1, in2, in3, in4; /* temporary input variables */
+ q31_t out1, out2, out3, out4; /* temporary output variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Read inputs */
+ in1 = (q31_t) * pSrc;
+ in2 = (q31_t) * (pSrc + 1);
+ in3 = (q31_t) * (pSrc + 2);
+
+ /* find absolute value */
+ out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
+
+ /* read input */
+ in4 = (q31_t) * (pSrc + 3);
+
+ /* find absolute value */
+ out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
+
+ /* store result to destination */
+ *pDst = (q7_t) out1;
+
+ /* find absolute value */
+ out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
+
+ /* find absolute value */
+ out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
+
+ /* store result to destination */
+ *(pDst + 1) = (q7_t) out2;
+
+ /* store result to destination */
+ *(pDst + 2) = (q7_t) out3;
+
+ /* store result to destination */
+ *(pDst + 3) = (q7_t) out4;
+
+ /* update pointers to process next samples */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+#else
+
+ /* Run the below code for Cortex-M0 */
+ blkCnt = blockSize;
+
+#endif /* #define ARM_MATH_CM0_FAMILY */
+
+ while (blkCnt > 0U)
+ {
+ /* C = |A| */
+ /* Read the input */
+ in = *pSrc++;
+
+ /* Store the Absolute result in the destination buffer */
+ *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicAbs group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
index 5dc518e..78feb64 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
@@ -1,150 +1,138 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_add_f32.c
-*
-* Description: Floating-point vector addition.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup BasicAdd Vector Addition
- *
- * Element-by-element addition of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup BasicAdd
- * @{
- */
-
-/**
- * @brief Floating-point vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
-void arm_add_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
- float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
-
- /* read four inputs from sourceA and four inputs from sourceB */
- inA1 = *pSrcA;
- inB1 = *pSrcB;
- inA2 = *(pSrcA + 1);
- inB2 = *(pSrcB + 1);
- inA3 = *(pSrcA + 2);
- inB3 = *(pSrcB + 2);
- inA4 = *(pSrcA + 3);
- inB4 = *(pSrcB + 3);
-
- /* C = A + B */
- /* add and store result to destination */
- *pDst = inA1 + inB1;
- *(pDst + 1) = inA2 + inB2;
- *(pDst + 2) = inA3 + inB3;
- *(pDst + 3) = inA4 + inB4;
-
- /* update pointers to process next samples */
- pSrcA += 4u;
- pSrcB += 4u;
- pDst += 4u;
-
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (*pSrcA++) + (*pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_add_f32.c
+ * Description: Floating-point vector addition
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup BasicAdd Vector Addition
+ *
+ * Element-by-element addition of two vectors.
+ *
+ * <pre>
+ * pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize.
+ * </pre>
+ *
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup BasicAdd
+ * @{
+ */
+
+/**
+ * @brief Floating-point vector addition.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ */
+
+void arm_add_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */
+ float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+
+ /* read four inputs from sourceA and four inputs from sourceB */
+ inA1 = *pSrcA;
+ inB1 = *pSrcB;
+ inA2 = *(pSrcA + 1);
+ inB2 = *(pSrcB + 1);
+ inA3 = *(pSrcA + 2);
+ inB3 = *(pSrcB + 2);
+ inA4 = *(pSrcA + 3);
+ inB4 = *(pSrcB + 3);
+
+ /* C = A + B */
+ /* add and store result to destination */
+ *pDst = inA1 + inB1;
+ *(pDst + 1) = inA2 + inB2;
+ *(pDst + 2) = inA3 + inB3;
+ *(pDst + 3) = inA4 + inB4;
+
+ /* update pointers to process next samples */
+ pSrcA += 4U;
+ pSrcB += 4U;
+ pDst += 4U;
+
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicAdd group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
index f256cf7..80a523f 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
@@ -1,140 +1,128 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_add_q15.c
-*
-* Description: Q15 vector addition
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAdd
- * @{
- */
-
-/**
- * @brief Q15 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_add_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inB1, inB2;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- inA1 = *__SIMD32(pSrcA)++;
- inA2 = *__SIMD32(pSrcA)++;
- inB1 = *__SIMD32(pSrcB)++;
- inB2 = *__SIMD32(pSrcB)++;
-
- *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
- *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**
- * @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_add_q15.c
+ * Description: Q15 vector addition
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAdd
+ * @{
+ */
+
+/**
+ * @brief Q15 vector addition.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ */
+
+void arm_add_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inB1, inB2;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ inA1 = *__SIMD32(pSrcA)++;
+ inA2 = *__SIMD32(pSrcA)++;
+ inB1 = *__SIMD32(pSrcB)++;
+ inB2 = *__SIMD32(pSrcB)++;
+
+ *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
+ *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+}
+
+/**
+ * @} end of BasicAdd group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
index 614d6f3..c008bcc 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
@@ -1,148 +1,136 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_add_q31.c
-*
-* Description: Q31 vector addition.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAdd
- * @{
- */
-
-
-/**
- * @brief Q31 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
- */
-
-void arm_add_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
-
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- *pDst++ = __QADD(inA1, inB1);
- *pDst++ = __QADD(inA2, inB2);
- *pDst++ = __QADD(inA3, inB3);
- *pDst++ = __QADD(inA4, inB4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_add_q31.c
+ * Description: Q31 vector addition
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAdd
+ * @{
+ */
+
+
+/**
+ * @brief Q31 vector addition.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+ */
+
+void arm_add_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inA3, inA4;
+ q31_t inB1, inB2, inB3, inB4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ inA1 = *pSrcA++;
+ inA2 = *pSrcA++;
+ inB1 = *pSrcB++;
+ inB2 = *pSrcB++;
+
+ inA3 = *pSrcA++;
+ inA4 = *pSrcA++;
+ inB3 = *pSrcB++;
+ inB4 = *pSrcB++;
+
+ *pDst++ = __QADD(inA1, inB1);
+ *pDst++ = __QADD(inA2, inB2);
+ *pDst++ = __QADD(inA3, inB3);
+ *pDst++ = __QADD(inA4, inB4);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of BasicAdd group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
index 1a0a070..ab4e785 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
@@ -1,134 +1,122 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_add_q7.c
-*
-* Description: Q7 vector addition.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicAdd
- * @{
- */
-
-/**
- * @brief Q7 vector addition.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_add_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + B */
- /* Add and then store the results in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**
- * @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_add_q7.c
+ * Description: Q7 vector addition
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicAdd
+ * @{
+ */
+
+/**
+ * @brief Q7 vector addition.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ */
+
+void arm_add_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + B */
+ /* Add and then store the results in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+}
+
+/**
+ * @} end of BasicAdd group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
index 5efe6f7..0cd0afc 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
@@ -1,135 +1,123 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_dot_prod_f32.c
-*
-* Description: Floating-point dot product.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup dot_prod Vector Dot Product
- *
- * Computes the dot product of two vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * <pre>
- * sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup dot_prod
- * @{
- */
-
-/**
- * @brief Dot product of floating-point vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- */
-
-
-void arm_dot_prod_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- uint32_t blockSize,
- float32_t * result)
-{
- float32_t sum = 0.0f; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer */
- sum += (*pSrcA++) * (*pSrcB++);
- sum += (*pSrcA++) * (*pSrcB++);
- sum += (*pSrcA++) * (*pSrcB++);
- sum += (*pSrcA++) * (*pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- sum += (*pSrcA++) * (*pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- /* Store the result back in the destination buffer */
- *result = sum;
-}
-
-/**
- * @} end of dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_dot_prod_f32.c
+ * Description: Floating-point dot product
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup dot_prod Vector Dot Product
+ *
+ * Computes the dot product of two vectors.
+ * The vectors are multiplied element-by-element and then summed.
+ *
+ * <pre>
+ * sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+ * </pre>
+ *
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup dot_prod
+ * @{
+ */
+
+/**
+ * @brief Dot product of floating-point vectors.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] *result output result returned here
+ * @return none.
+ */
+
+
+void arm_dot_prod_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ uint32_t blockSize,
+ float32_t * result)
+{
+ float32_t sum = 0.0f; /* Temporary result storage */
+ uint32_t blkCnt; /* loop counter */
+
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the result in a temporary buffer */
+ sum += (*pSrcA++) * (*pSrcB++);
+ sum += (*pSrcA++) * (*pSrcB++);
+ sum += (*pSrcA++) * (*pSrcB++);
+ sum += (*pSrcA++) * (*pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the result in a temporary buffer. */
+ sum += (*pSrcA++) * (*pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ /* Store the result back in the destination buffer */
+ *result = sum;
+}
+
+/**
+ * @} end of dot_prod group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
index 0620139..dec4ec5 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
@@ -1,140 +1,128 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_dot_prod_q15.c
-*
-* Description: Q15 dot product.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup dot_prod
- * @{
- */
-
-/**
- * @brief Dot product of Q15 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
- * results are added to a 64-bit accumulator in 34.30 format.
- * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
- * there is no risk of overflow.
- * The return result is in 34.30 format.
- */
-
-void arm_dot_prod_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- uint32_t blockSize,
- q63_t * result)
-{
- q63_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
- sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the results in a temporary buffer. */
- sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the results in a temporary buffer. */
- sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- /* Store the result in the destination buffer in 34.30 format */
- *result = sum;
-
-}
-
-/**
- * @} end of dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_dot_prod_q15.c
+ * Description: Q15 dot product
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup dot_prod
+ * @{
+ */
+
+/**
+ * @brief Dot product of Q15 vectors.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] *result output result returned here
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
+ * results are added to a 64-bit accumulator in 34.30 format.
+ * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
+ * there is no risk of overflow.
+ * The return result is in 34.30 format.
+ */
+
+void arm_dot_prod_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result)
+{
+ q63_t sum = 0; /* Temporary result storage */
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the result in a temporary buffer. */
+ sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
+ sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the results in a temporary buffer. */
+ sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the results in a temporary buffer. */
+ sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ /* Store the result in the destination buffer in 34.30 format */
+ *result = sum;
+
+}
+
+/**
+ * @} end of dot_prod group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
index 4ec060e..67ae887 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
@@ -1,143 +1,131 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_dot_prod_q31.c
-*
-* Description: Q31 dot product.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup dot_prod
- * @{
- */
-
-/**
- * @brief Dot product of Q31 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
- * are truncated to 2.48 format by discarding the lower 14 bits.
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
- * There are 15 guard bits in the accumulator and there is no risk of overflow as long as
- * the length of the vectors is less than 2^16 elements.
- * The return result is in 16.48 format.
- */
-
-void arm_dot_prod_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- uint32_t blockSize,
- q63_t * result)
-{
- q63_t sum = 0; /* Temporary result storage */
- uint32_t blkCnt; /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- sum += ((q63_t) inA1 * inB1) >> 14u;
- sum += ((q63_t) inA2 * inB2) >> 14u;
- sum += ((q63_t) inA3 * inB3) >> 14u;
- sum += ((q63_t) inA4 * inB4) >> 14u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Calculate dot product and then store the result in a temporary buffer. */
- sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* Store the result in the destination buffer in 16.48 format */
- *result = sum;
-}
-
-/**
- * @} end of dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_dot_prod_q31.c
+ * Description: Q31 dot product
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup dot_prod
+ * @{
+ */
+
+/**
+ * @brief Dot product of Q31 vectors.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] *result output result returned here
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
+ * are truncated to 2.48 format by discarding the lower 14 bits.
+ * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+ * There are 15 guard bits in the accumulator and there is no risk of overflow as long as
+ * the length of the vectors is less than 2^16 elements.
+ * The return result is in 16.48 format.
+ */
+
+void arm_dot_prod_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ uint32_t blockSize,
+ q63_t * result)
+{
+ q63_t sum = 0; /* Temporary result storage */
+ uint32_t blkCnt; /* loop counter */
+
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inA3, inA4;
+ q31_t inB1, inB2, inB3, inB4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the result in a temporary buffer. */
+ inA1 = *pSrcA++;
+ inA2 = *pSrcA++;
+ inA3 = *pSrcA++;
+ inA4 = *pSrcA++;
+ inB1 = *pSrcB++;
+ inB2 = *pSrcB++;
+ inB3 = *pSrcB++;
+ inB4 = *pSrcB++;
+
+ sum += ((q63_t) inA1 * inB1) >> 14U;
+ sum += ((q63_t) inA2 * inB2) >> 14U;
+ sum += ((q63_t) inA3 * inB3) >> 14U;
+ sum += ((q63_t) inA4 * inB4) >> 14U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Calculate dot product and then store the result in a temporary buffer. */
+ sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* Store the result in the destination buffer in 16.48 format */
+ *result = sum;
+}
+
+/**
+ * @} end of dot_prod group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
index cbdf713..487efe3 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
@@ -1,159 +1,147 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_dot_prod_q7.c
-*
-* Description: Q7 dot product.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup dot_prod
- * @{
- */
-
-/**
- * @brief Dot product of Q7 vectors.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[in] blockSize number of samples in each vector
- * @param[out] *result output result returned here
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
- * results are added to an accumulator in 18.14 format.
- * Nonsaturating additions are used and there is no danger of wrap around as long as
- * the vectors are less than 2^18 elements long.
- * The return result is in 18.14 format.
- */
-
-void arm_dot_prod_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- uint32_t blockSize,
- q31_t * result)
-{
- uint32_t blkCnt; /* loop counter */
-
- q31_t sum = 0; /* Temporary variables to store output */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t input1, input2; /* Temporary variables to store input */
- q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
-
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* read 4 samples at a time from sourceA */
- input1 = *__SIMD32(pSrcA)++;
- /* read 4 samples at a time from sourceB */
- input2 = *__SIMD32(pSrcB)++;
-
- /* extract two q7_t samples to q15_t samples */
- inA1 = __SXTB16(__ROR(input1, 8));
- /* extract reminaing two samples */
- inA2 = __SXTB16(input1);
- /* extract two q7_t samples to q15_t samples */
- inB1 = __SXTB16(__ROR(input2, 8));
- /* extract reminaing two samples */
- inB2 = __SXTB16(input2);
-
- /* multiply and accumulate two samples at a time */
- sum = __SMLAD(inA1, inB1, sum);
- sum = __SMLAD(inA2, inB2, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Dot product and then store the results in a temporary buffer. */
- sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
- /* Dot product and then store the results in a temporary buffer. */
- sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- /* Store the result in the destination buffer in 18.14 format */
- *result = sum;
-}
-
-/**
- * @} end of dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_dot_prod_q7.c
+ * Description: Q7 dot product
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup dot_prod
+ * @{
+ */
+
+/**
+ * @brief Dot product of Q7 vectors.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[in] blockSize number of samples in each vector
+ * @param[out] *result output result returned here
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
+ * results are added to an accumulator in 18.14 format.
+ * Nonsaturating additions are used and there is no danger of wrap around as long as
+ * the vectors are less than 2^18 elements long.
+ * The return result is in 18.14 format.
+ */
+
+void arm_dot_prod_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ uint32_t blockSize,
+ q31_t * result)
+{
+ uint32_t blkCnt; /* loop counter */
+
+ q31_t sum = 0; /* Temporary variables to store output */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ q31_t input1, input2; /* Temporary variables to store input */
+ q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
+
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* read 4 samples at a time from sourceA */
+ input1 = *__SIMD32(pSrcA)++;
+ /* read 4 samples at a time from sourceB */
+ input2 = *__SIMD32(pSrcB)++;
+
+ /* extract two q7_t samples to q15_t samples */
+ inA1 = __SXTB16(__ROR(input1, 8));
+ /* extract reminaing two samples */
+ inA2 = __SXTB16(input1);
+ /* extract two q7_t samples to q15_t samples */
+ inB1 = __SXTB16(__ROR(input2, 8));
+ /* extract reminaing two samples */
+ inB2 = __SXTB16(input2);
+
+ /* multiply and accumulate two samples at a time */
+ sum = __SMLAD(inA1, inB1, sum);
+ sum = __SMLAD(inA2, inB2, sum);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Dot product and then store the results in a temporary buffer. */
+ sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+ /* Dot product and then store the results in a temporary buffer. */
+ sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ /* Store the result in the destination buffer in 18.14 format */
+ *result = sum;
+}
+
+/**
+ * @} end of dot_prod group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
index 239019a..e4a9ef2 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
@@ -1,174 +1,162 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_mult_f32.c
-*
-* Description: Floating-point vector multiplication.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup BasicMult Vector Multiplication
- *
- * Element-by-element multiplication of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup BasicMult
- * @{
- */
-
-/**
- * @brief Floating-point vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
-void arm_mult_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-#ifndef ARM_MATH_CM0_FAMILY
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
- float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
- float32_t out1, out2, out3, out4; /* temporary output variables */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and store the results in output buffer */
- /* read sample from sourceA */
- inA1 = *pSrcA;
- /* read sample from sourceB */
- inB1 = *pSrcB;
- /* read sample from sourceA */
- inA2 = *(pSrcA + 1);
- /* read sample from sourceB */
- inB2 = *(pSrcB + 1);
-
- /* out = sourceA * sourceB */
- out1 = inA1 * inB1;
-
- /* read sample from sourceA */
- inA3 = *(pSrcA + 2);
- /* read sample from sourceB */
- inB3 = *(pSrcB + 2);
-
- /* out = sourceA * sourceB */
- out2 = inA2 * inB2;
-
- /* read sample from sourceA */
- inA4 = *(pSrcA + 3);
-
- /* store result to destination buffer */
- *pDst = out1;
-
- /* read sample from sourceB */
- inB4 = *(pSrcB + 3);
-
- /* out = sourceA * sourceB */
- out3 = inA3 * inB3;
-
- /* store result to destination buffer */
- *(pDst + 1) = out2;
-
- /* out = sourceA * sourceB */
- out4 = inA4 * inB4;
- /* store result to destination buffer */
- *(pDst + 2) = out3;
- /* store result to destination buffer */
- *(pDst + 3) = out4;
-
-
- /* update pointers to process next samples */
- pSrcA += 4u;
- pSrcB += 4u;
- pDst += 4u;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and store the results in output buffer */
- *pDst++ = (*pSrcA++) * (*pSrcB++);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_mult_f32.c
+ * Description: Floating-point vector multiplication
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup BasicMult Vector Multiplication
+ *
+ * Element-by-element multiplication of two vectors.
+ *
+ * <pre>
+ * pDst[n] = pSrcA[n] * pSrcB[n], 0 <= n < blockSize.
+ * </pre>
+ *
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup BasicMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point vector multiplication.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ */
+
+void arm_mult_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counters */
+#if defined (ARM_MATH_DSP)
+
+ /* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t inA1, inA2, inA3, inA4; /* temporary input variables */
+ float32_t inB1, inB2, inB3, inB4; /* temporary input variables */
+ float32_t out1, out2, out3, out4; /* temporary output variables */
+
+ /* loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and store the results in output buffer */
+ /* read sample from sourceA */
+ inA1 = *pSrcA;
+ /* read sample from sourceB */
+ inB1 = *pSrcB;
+ /* read sample from sourceA */
+ inA2 = *(pSrcA + 1);
+ /* read sample from sourceB */
+ inB2 = *(pSrcB + 1);
+
+ /* out = sourceA * sourceB */
+ out1 = inA1 * inB1;
+
+ /* read sample from sourceA */
+ inA3 = *(pSrcA + 2);
+ /* read sample from sourceB */
+ inB3 = *(pSrcB + 2);
+
+ /* out = sourceA * sourceB */
+ out2 = inA2 * inB2;
+
+ /* read sample from sourceA */
+ inA4 = *(pSrcA + 3);
+
+ /* store result to destination buffer */
+ *pDst = out1;
+
+ /* read sample from sourceB */
+ inB4 = *(pSrcB + 3);
+
+ /* out = sourceA * sourceB */
+ out3 = inA3 * inB3;
+
+ /* store result to destination buffer */
+ *(pDst + 1) = out2;
+
+ /* out = sourceA * sourceB */
+ out4 = inA4 * inB4;
+ /* store result to destination buffer */
+ *(pDst + 2) = out3;
+ /* store result to destination buffer */
+ *(pDst + 3) = out4;
+
+
+ /* update pointers to process next samples */
+ pSrcA += 4U;
+ pSrcB += 4U;
+ pDst += 4U;
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and store the results in output buffer */
+ *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicMult group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
index 68b4f1b..8e20963 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
@@ -1,154 +1,142 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_mult_q15.c
-*
-* Description: Q15 vector multiplication.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicMult
- * @{
- */
-
-
-/**
- * @brief Q15 vector multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
- q15_t out1, out2, out3, out4; /* temporary output variables */
- q31_t mul1, mul2, mul3, mul4; /* temporary variables */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* read two samples at a time from sourceA */
- inA1 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB1 = *__SIMD32(pSrcB)++;
- /* read two samples at a time from sourceA */
- inA2 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB2 = *__SIMD32(pSrcB)++;
-
- /* multiply mul = sourceA * sourceB */
- mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
- mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
- mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
- mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
-
- /* saturate result to 16 bit */
- out1 = (q15_t) __SSAT(mul1 >> 15, 16);
- out2 = (q15_t) __SSAT(mul2 >> 15, 16);
- out3 = (q15_t) __SSAT(mul3 >> 15, 16);
- out4 = (q15_t) __SSAT(mul4 >> 15, 16);
-
- /* store the result */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#endif // #ifndef ARM_MATH_BIG_ENDIAN
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
- *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_mult_q15.c
+ * Description: Q15 vector multiplication
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicMult
+ * @{
+ */
+
+
+/**
+ * @brief Q15 vector multiplication
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ */
+
+void arm_mult_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counters */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
+ q15_t out1, out2, out3, out4; /* temporary output variables */
+ q31_t mul1, mul2, mul3, mul4; /* temporary variables */
+
+ /* loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* read two samples at a time from sourceA */
+ inA1 = *__SIMD32(pSrcA)++;
+ /* read two samples at a time from sourceB */
+ inB1 = *__SIMD32(pSrcB)++;
+ /* read two samples at a time from sourceA */
+ inA2 = *__SIMD32(pSrcA)++;
+ /* read two samples at a time from sourceB */
+ inB2 = *__SIMD32(pSrcB)++;
+
+ /* multiply mul = sourceA * sourceB */
+ mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+ mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
+ mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
+ mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
+
+ /* saturate result to 16 bit */
+ out1 = (q15_t) __SSAT(mul1 >> 15, 16);
+ out2 = (q15_t) __SSAT(mul2 >> 15, 16);
+ out3 = (q15_t) __SSAT(mul3 >> 15, 16);
+ out4 = (q15_t) __SSAT(mul4 >> 15, 16);
+
+ /* store the result */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
+ *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
+
+#else
+
+ *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
+ *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and store the result in the destination buffer */
+ *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicMult group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
index d2406fd..c302b01 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
@@ -1,160 +1,148 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_mult_q31.c
-*
-* Description: Q31 vector multiplication.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicMult
- * @{
- */
-
-/**
- * @brief Q31 vector multiplication.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
- */
-
-void arm_mult_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
- q31_t inB1, inB2, inB3, inB4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variables */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out2 = ((q63_t) inA2 * inB2) >> 32;
- out3 = ((q63_t) inA3 * inB3) >> 32;
- out4 = ((q63_t) inA4 * inB4) >> 32;
-
- out1 = __SSAT(out1, 31);
- out2 = __SSAT(out2, 31);
- out3 = __SSAT(out3, 31);
- out4 = __SSAT(out4, 31);
-
- *pDst++ = out1 << 1u;
- *pDst++ = out2 << 1u;
- *pDst++ = out3 << 1u;
- *pDst++ = out4 << 1u;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inB1 = *pSrcB++;
- out1 = ((q63_t) inA1 * inB1) >> 32;
- out1 = __SSAT(out1, 31);
- *pDst++ = out1 << 1u;
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and then store the results in the destination buffer. */
- *pDst++ =
- (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-/**
- * @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_mult_q31.c
+ * Description: Q31 vector multiplication
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicMult
+ * @{
+ */
+
+/**
+ * @brief Q31 vector multiplication.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.
+ */
+
+void arm_mult_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counters */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inA3, inA4; /* temporary input variables */
+ q31_t inB1, inB2, inB3, inB4; /* temporary input variables */
+ q31_t out1, out2, out3, out4; /* temporary output variables */
+
+ /* loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and then store the results in the destination buffer. */
+ inA1 = *pSrcA++;
+ inA2 = *pSrcA++;
+ inA3 = *pSrcA++;
+ inA4 = *pSrcA++;
+ inB1 = *pSrcB++;
+ inB2 = *pSrcB++;
+ inB3 = *pSrcB++;
+ inB4 = *pSrcB++;
+
+ out1 = ((q63_t) inA1 * inB1) >> 32;
+ out2 = ((q63_t) inA2 * inB2) >> 32;
+ out3 = ((q63_t) inA3 * inB3) >> 32;
+ out4 = ((q63_t) inA4 * inB4) >> 32;
+
+ out1 = __SSAT(out1, 31);
+ out2 = __SSAT(out2, 31);
+ out3 = __SSAT(out3, 31);
+ out4 = __SSAT(out4, 31);
+
+ *pDst++ = out1 << 1U;
+ *pDst++ = out2 << 1U;
+ *pDst++ = out3 << 1U;
+ *pDst++ = out4 << 1U;
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and then store the results in the destination buffer. */
+ inA1 = *pSrcA++;
+ inB1 = *pSrcB++;
+ out1 = ((q63_t) inA1 * inB1) >> 32;
+ out1 = __SSAT(out1, 31);
+ *pDst++ = out1 << 1U;
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and then store the results in the destination buffer. */
+ *pDst++ =
+ (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+}
+
+/**
+ * @} end of BasicMult group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
index 264406c..d8a2f8a 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
@@ -1,127 +1,115 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_mult_q7.c
-*
-* Description: Q7 vector multiplication.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicMult
- * @{
- */
-
-/**
- * @brief Q7 vector multiplication
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and store the results in temporary variables */
- out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
- out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
- out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
- out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
- /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
- *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_mult_q7.c
+ * Description: Q7 vector multiplication
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicMult
+ * @{
+ */
+
+/**
+ * @brief Q7 vector multiplication
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ */
+
+void arm_mult_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counters */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
+
+ /* loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and store the results in temporary variables */
+ out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+ out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+ /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
+ *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * B */
+ /* Multiply the inputs and store the result in the destination buffer */
+ *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+ /* Decrement the blockSize loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicMult group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
index 1f120c5..e39624c 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
@@ -1,146 +1,134 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_negate_f32.c
-*
-* Description: Negates floating-point vectors.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup negate Vector Negate
- *
- * Negates the elements of a vector.
- *
- * <pre>
- * pDst[n] = -pSrc[n], 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup negate
- * @{
- */
-
-/**
- * @brief Negates the elements of a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
-void arm_negate_f32(
- float32_t * pSrc,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* read inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* negate the input */
- in1 = -in1;
- in2 = -in2;
- in3 = -in3;
- in4 = -in4;
-
- /* store the result to destination */
- *pDst = in1;
- *(pDst + 1) = in2;
- *(pDst + 2) = in3;
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Negate and then store the results in the destination buffer. */
- *pDst++ = -*pSrc++;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of negate group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_negate_f32.c
+ * Description: Negates floating-point vectors
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup negate Vector Negate
+ *
+ * Negates the elements of a vector.
+ *
+ * <pre>
+ * pDst[n] = -pSrc[n], 0 <= n < blockSize.
+ * </pre>
+ *
+ * The functions support in-place computation allowing the source and
+ * destination pointers to reference the same memory buffer.
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup negate
+ * @{
+ */
+
+/**
+ * @brief Negates the elements of a floating-point vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ */
+
+void arm_negate_f32(
+ float32_t * pSrc,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t in1, in2, in3, in4; /* temporary variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* read inputs from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ /* negate the input */
+ in1 = -in1;
+ in2 = -in2;
+ in3 = -in3;
+ in4 = -in4;
+
+ /* store the result to destination */
+ *pDst = in1;
+ *(pDst + 1) = in2;
+ *(pDst + 2) = in3;
+ *(pDst + 3) = in4;
+
+ /* update pointers to process next samples */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Negate and then store the results in the destination buffer. */
+ *pDst++ = -*pSrc++;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of negate group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
index 2ad58a9..9624160 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
@@ -1,142 +1,131 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_negate_q15.c
-*
-* Description: Negates Q15 vectors.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup negate
- * @{
- */
-
-/**
- * @brief Negates the elements of a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
- */
-
-void arm_negate_q15(
- q15_t * pSrc,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- q15_t in;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t in1, in2; /* Temporary variables */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Read two inputs at a time */
- in1 = _SIMD32_OFFSET(pSrc);
- in2 = _SIMD32_OFFSET(pSrc + 2);
-
- /* negate two samples at a time */
- in1 = __QSUB16(0, in1);
-
- /* negate two samples at a time */
- in2 = __QSUB16(0, in2);
-
- /* store the result to destination 2 samples at a time */
- _SIMD32_OFFSET(pDst) = in1;
- /* store the result to destination 2 samples at a time */
- _SIMD32_OFFSET(pDst + 2) = in2;
-
-
- /* update pointers to process next samples */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Negate and then store the result in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of negate group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_negate_q15.c
+ * Description: Negates Q15 vectors
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup negate
+ * @{
+ */
+
+/**
+ * @brief Negates the elements of a Q15 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * \par Conditions for optimum performance
+ * Input and output buffers should be aligned by 32-bit
+ *
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+void arm_negate_q15(
+ q15_t * pSrc,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ q15_t in;
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ q31_t in1, in2; /* Temporary variables */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Read two inputs at a time */
+ in1 = _SIMD32_OFFSET(pSrc);
+ in2 = _SIMD32_OFFSET(pSrc + 2);
+
+ /* negate two samples at a time */
+ in1 = __QSUB16(0, in1);
+
+ /* negate two samples at a time */
+ in2 = __QSUB16(0, in2);
+
+ /* store the result to destination 2 samples at a time */
+ _SIMD32_OFFSET(pDst) = in1;
+ /* store the result to destination 2 samples at a time */
+ _SIMD32_OFFSET(pDst + 2) = in2;
+
+
+ /* update pointers to process next samples */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Negate and then store the result in the destination buffer. */
+ in = *pSrc++;
+ *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of negate group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
index afed808..4a5a58d 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
@@ -1,129 +1,117 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_negate_q31.c
-*
-* Description: Negates Q31 vectors.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup negate
- * @{
- */
-
-/**
- * @brief Negates the elements of a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
- */
-
-void arm_negate_q31(
- q31_t * pSrc,
- q31_t * pDst,
- uint32_t blockSize)
-{
- q31_t in; /* Temporary variable */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Negate and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- *pDst++ = __QSUB(0, in1);
- *pDst++ = __QSUB(0, in2);
- *pDst++ = __QSUB(0, in3);
- *pDst++ = __QSUB(0, in4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Negate and then store the result in the destination buffer. */
- in = *pSrc++;
- *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of negate group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_negate_q31.c
+ * Description: Negates Q31 vectors
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup negate
+ * @{
+ */
+
+/**
+ * @brief Negates the elements of a Q31 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+void arm_negate_q31(
+ q31_t * pSrc,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ q31_t in; /* Temporary variable */
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t in1, in2, in3, in4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Negate and then store the results in the destination buffer. */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
+
+ *pDst++ = __QSUB(0, in1);
+ *pDst++ = __QSUB(0, in2);
+ *pDst++ = __QSUB(0, in3);
+ *pDst++ = __QSUB(0, in4);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Negate and then store the result in the destination buffer. */
+ in = *pSrc++;
+ *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of negate group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
index 8d89265..d72c317 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
@@ -1,125 +1,113 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_negate_q7.c
-*
-* Description: Negates Q7 vectors.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup negate
- * @{
- */
-
-/**
- * @brief Negates the elements of a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
- */
-
-void arm_negate_q7(
- q7_t * pSrc,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- q7_t in;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t input; /* Input values1-4 */
- q31_t zero = 0x00000000;
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Read four inputs */
- input = *__SIMD32(pSrc)++;
-
- /* Store the Negated results in the destination buffer in a single cycle by packing the results */
- *__SIMD32(pDst)++ = __QSUB8(zero, input);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = -A */
- /* Negate and then store the results in the destination buffer. */ \
- in = *pSrc++;
- *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of negate group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_negate_q7.c
+ * Description: Negates Q7 vectors
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup negate
+ * @{
+ */
+
+/**
+ * @brief Negates the elements of a Q7 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ */
+
+void arm_negate_q7(
+ q7_t * pSrc,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ q7_t in;
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t input; /* Input values1-4 */
+ q31_t zero = 0x00000000;
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Read four inputs */
+ input = *__SIMD32(pSrc)++;
+
+ /* Store the Negated results in the destination buffer in a single cycle by packing the results */
+ *__SIMD32(pDst)++ = __QSUB8(zero, input);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = -A */
+ /* Negate and then store the results in the destination buffer. */ \
+ in = *pSrc++;
+ *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of negate group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
index 4b03a5e..ebc20a4 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
@@ -1,165 +1,154 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_offset_f32.c
-*
-* Description: Floating-point vector offset.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup offset Vector Offset
- *
- * Adds a constant offset to each element of a vector.
- *
- * <pre>
- * pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
- * </pre>
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup offset
- * @{
- */
-
-/**
- * @brief Adds a constant offset to a floating-point vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
-
-void arm_offset_f32(
- float32_t * pSrc,
- float32_t offset,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- /* read samples from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
-
- /* add offset to input */
- in1 = in1 + offset;
-
- /* read samples from source */
- in3 = *(pSrc + 2);
-
- /* add offset to input */
- in2 = in2 + offset;
-
- /* read samples from source */
- in4 = *(pSrc + 3);
-
- /* add offset to input */
- in3 = in3 + offset;
-
- /* store result to destination */
- *pDst = in1;
-
- /* add offset to input */
- in4 = in4 + offset;
-
- /* store result to destination */
- *(pDst + 1) = in2;
-
- /* store result to destination */
- *(pDst + 2) = in3;
-
- /* store result to destination */
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (*pSrc++) + offset;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of offset group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_offset_f32.c
+ * Description: Floating-point vector offset
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup offset Vector Offset
+ *
+ * Adds a constant offset to each element of a vector.
+ *
+ * <pre>
+ * pDst[n] = pSrc[n] + offset, 0 <= n < blockSize.
+ * </pre>
+ *
+ * The functions support in-place computation allowing the source and
+ * destination pointers to reference the same memory buffer.
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup offset
+ * @{
+ */
+
+/**
+ * @brief Adds a constant offset to a floating-point vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ */
+
+
+void arm_offset_f32(
+ float32_t * pSrc,
+ float32_t offset,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t in1, in2, in3, in4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination buffer. */
+ /* read samples from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+
+ /* add offset to input */
+ in1 = in1 + offset;
+
+ /* read samples from source */
+ in3 = *(pSrc + 2);
+
+ /* add offset to input */
+ in2 = in2 + offset;
+
+ /* read samples from source */
+ in4 = *(pSrc + 3);
+
+ /* add offset to input */
+ in3 = in3 + offset;
+
+ /* store result to destination */
+ *pDst = in1;
+
+ /* add offset to input */
+ in4 = in4 + offset;
+
+ /* store result to destination */
+ *(pDst + 1) = in2;
+
+ /* store result to destination */
+ *(pDst + 2) = in3;
+
+ /* store result to destination */
+ *(pDst + 3) = in4;
+
+ /* update pointers to process next samples */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the result in the destination buffer. */
+ *pDst++ = (*pSrc++) + offset;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of offset group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
index f891c4c..dab0b10 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
@@ -1,136 +1,124 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_offset_q15.c
-*
-* Description: Q15 vector offset.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup offset
- * @{
- */
-
-/**
- * @brief Adds a constant offset to a Q15 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_offset_q15(
- q15_t * pSrc,
- q15_t offset,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t offset_packed; /* Offset packed to 32 bit */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* Offset is packed to 32 bit in order to use SIMD32 for addition */
- offset_packed = __PKHBT(offset, offset, 16);
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
- *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
- *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of offset group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_offset_q15.c
+ * Description: Q15 vector offset
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup offset
+ * @{
+ */
+
+/**
+ * @brief Adds a constant offset to a Q15 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_offset_q15(
+ q15_t * pSrc,
+ q15_t offset,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t offset_packed; /* Offset packed to 32 bit */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+ offset_packed = __PKHBT(offset, offset, 16);
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
+ *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
+ *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination buffer. */
+ *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination buffer. */
+ *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of offset group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
index 7c040d3..655426e 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
@@ -1,140 +1,128 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_offset_q31.c
-*
-* Description: Q31 vector offset.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup offset
- * @{
- */
-
-/**
- * @brief Adds a constant offset to a Q31 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_offset_q31(
- q31_t * pSrc,
- q31_t offset,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t in1, in2, in3, in4;
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination buffer. */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- *pDst++ = __QADD(in1, offset);
- *pDst++ = __QADD(in2, offset);
- *pDst++ = __QADD(in3, offset);
- *pDst++ = __QADD(in4, offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = __QADD(*pSrc++, offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of offset group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_offset_q31.c
+ * Description: Q31 vector offset
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup offset
+ * @{
+ */
+
+/**
+ * @brief Adds a constant offset to a Q31 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_offset_q31(
+ q31_t * pSrc,
+ q31_t offset,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t in1, in2, in3, in4;
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination buffer. */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
+
+ *pDst++ = __QADD(in1, offset);
+ *pDst++ = __QADD(in2, offset);
+ *pDst++ = __QADD(in3, offset);
+ *pDst++ = __QADD(in4, offset);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the result in the destination buffer. */
+ *pDst++ = __QADD(*pSrc++, offset);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the result in the destination buffer. */
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of offset group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
index 27db732..5de6241 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
@@ -1,135 +1,123 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_offset_q7.c
-*
-* Description: Q7 vector offset.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup offset
- * @{
- */
-
-/**
- * @brief Adds a constant offset to a Q7 vector.
- * @param[in] *pSrc points to the input vector
- * @param[in] offset is the offset to be added
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
- */
-
-void arm_offset_q7(
- q7_t * pSrc,
- q7_t offset,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t offset_packed; /* Offset packed to 32 bit */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* Offset is packed to 32 bit in order to use SIMD32 for addition */
- offset_packed = __PACKq7(offset, offset, offset, offset);
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
- *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A + offset */
- /* Add offset and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of offset group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_offset_q7.c
+ * Description: Q7 vector offset
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup offset
+ * @{
+ */
+
+/**
+ * @brief Adds a constant offset to a Q7 vector.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] offset is the offset to be added
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+void arm_offset_q7(
+ q7_t * pSrc,
+ q7_t offset,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t offset_packed; /* Offset packed to 32 bit */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+ offset_packed = __PACKq7(offset, offset, offset, offset);
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
+ *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A + offset */
+ /* Add offset and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of offset group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
index f675f7a..c90c037 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
@@ -1,169 +1,157 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_scale_f32.c
-*
-* Description: Multiplies a floating-point vector by a scalar.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup scale Vector Scale
- *
- * Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
- *
- * <pre>
- * pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
- * </pre>
- *
- * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
- * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
- * The shift allows the gain of the scaling operation to exceed 1.0.
- * The algorithm used with fixed-point data is:
- *
- * <pre>
- * pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
- * </pre>
- *
- * The overall scale factor applied to the fixed-point data is
- * <pre>
- * scale = scaleFract * 2^shift.
- * </pre>
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
- */
-
-/**
- * @addtogroup scale
- * @{
- */
-
-/**
- * @brief Multiplies a floating-point vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scale scale factor to be applied
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- */
-
-
-void arm_scale_f32(
- float32_t * pSrc,
- float32_t scale,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t in1, in2, in3, in4; /* temporary variabels */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the results in the destination buffer. */
- /* read input samples from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
-
- /* multiply with scaling factor */
- in1 = in1 * scale;
-
- /* read input sample from source */
- in3 = *(pSrc + 2);
-
- /* multiply with scaling factor */
- in2 = in2 * scale;
-
- /* read input sample from source */
- in4 = *(pSrc + 3);
-
- /* multiply with scaling factor */
- in3 = in3 * scale;
- in4 = in4 * scale;
- /* store the result to destination */
- *pDst = in1;
- *(pDst + 1) = in2;
- *(pDst + 2) = in3;
- *(pDst + 3) = in4;
-
- /* update pointers to process next samples */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (*pSrc++) * scale;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of scale group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_scale_f32.c
+ * Description: Multiplies a floating-point vector by a scalar
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup scale Vector Scale
+ *
+ * Multiply a vector by a scalar value. For floating-point data, the algorithm used is:
+ *
+ * <pre>
+ * pDst[n] = pSrc[n] * scale, 0 <= n < blockSize.
+ * </pre>
+ *
+ * In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
+ * a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+ * The shift allows the gain of the scaling operation to exceed 1.0.
+ * The algorithm used with fixed-point data is:
+ *
+ * <pre>
+ * pDst[n] = (pSrc[n] * scaleFract) << shift, 0 <= n < blockSize.
+ * </pre>
+ *
+ * The overall scale factor applied to the fixed-point data is
+ * <pre>
+ * scale = scaleFract * 2^shift.
+ * </pre>
+ *
+ * The functions support in-place computation allowing the source and destination
+ * pointers to reference the same memory buffer.
+ */
+
+/**
+ * @addtogroup scale
+ * @{
+ */
+
+/**
+ * @brief Multiplies a floating-point vector by a scalar.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] scale scale factor to be applied
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ */
+
+
+void arm_scale_f32(
+ float32_t * pSrc,
+ float32_t scale,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t in1, in2, in3, in4; /* temporary variabels */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the results in the destination buffer. */
+ /* read input samples from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+
+ /* multiply with scaling factor */
+ in1 = in1 * scale;
+
+ /* read input sample from source */
+ in3 = *(pSrc + 2);
+
+ /* multiply with scaling factor */
+ in2 = in2 * scale;
+
+ /* read input sample from source */
+ in4 = *(pSrc + 3);
+
+ /* multiply with scaling factor */
+ in3 = in3 * scale;
+ in4 = in4 * scale;
+ /* store the result to destination */
+ *pDst = in1;
+ *(pDst + 1) = in2;
+ *(pDst + 2) = in3;
+ *(pDst + 3) = in4;
+
+ /* update pointers to process next samples */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ *pDst++ = (*pSrc++) * scale;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of scale group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
index 82f3dd9..9d5727d 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
@@ -1,162 +1,150 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_scale_q15.c
-*
-* Description: Multiplies a Q15 vector by a scalar.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup scale
- * @{
- */
-
-/**
- * @brief Multiplies a Q15 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
- */
-
-
-void arm_scale_q15(
- q15_t * pSrc,
- q15_t scaleFract,
- int8_t shift,
- q15_t * pDst,
- uint32_t blockSize)
-{
- int8_t kShift = 15 - shift; /* shift to apply after scaling */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q15_t in1, in2, in3, in4;
- q31_t inA1, inA2; /* Temporary variables */
- q31_t out1, out2, out3, out4;
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* Reading 2 inputs from memory */
- inA1 = *__SIMD32(pSrc)++;
- inA2 = *__SIMD32(pSrc)++;
-
- /* C = A * scale */
- /* Scale the inputs and then store the 2 results in the destination buffer
- * in single cycle by packing the outputs */
- out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
- out2 = (q31_t) ((q15_t) inA1 * scaleFract);
- out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
- out4 = (q31_t) ((q15_t) inA2 * scaleFract);
-
- /* apply shifting */
- out1 = out1 >> kShift;
- out2 = out2 >> kShift;
- out3 = out3 >> kShift;
- out4 = out4 >> kShift;
-
- /* saturate the output */
- in1 = (q15_t) (__SSAT(out1, 16));
- in2 = (q15_t) (__SSAT(out2, 16));
- in3 = (q15_t) (__SSAT(out3, 16));
- in4 = (q15_t) (__SSAT(out4, 16));
-
- /* store the result to destination */
- *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
- *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of scale group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_scale_q15.c
+ * Description: Multiplies a Q15 vector by a scalar
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup scale
+ * @{
+ */
+
+/**
+ * @brief Multiplies a Q15 vector by a scalar.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+ * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
+
+
+void arm_scale_q15(
+ q15_t * pSrc,
+ q15_t scaleFract,
+ int8_t shift,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ int8_t kShift = 15 - shift; /* shift to apply after scaling */
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q15_t in1, in2, in3, in4;
+ q31_t inA1, inA2; /* Temporary variables */
+ q31_t out1, out2, out3, out4;
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* Reading 2 inputs from memory */
+ inA1 = *__SIMD32(pSrc)++;
+ inA2 = *__SIMD32(pSrc)++;
+
+ /* C = A * scale */
+ /* Scale the inputs and then store the 2 results in the destination buffer
+ * in single cycle by packing the outputs */
+ out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
+ out2 = (q31_t) ((q15_t) inA1 * scaleFract);
+ out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
+ out4 = (q31_t) ((q15_t) inA2 * scaleFract);
+
+ /* apply shifting */
+ out1 = out1 >> kShift;
+ out2 = out2 >> kShift;
+ out3 = out3 >> kShift;
+ out4 = out4 >> kShift;
+
+ /* saturate the output */
+ in1 = (q15_t) (__SSAT(out1, 16));
+ in2 = (q15_t) (__SSAT(out2, 16));
+ in3 = (q15_t) (__SSAT(out3, 16));
+ in4 = (q15_t) (__SSAT(out4, 16));
+
+ /* store the result to destination */
+ *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
+ *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of scale group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
index c304cfd..e89524d 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
@@ -1,239 +1,227 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_scale_q31.c
-*
-* Description: Multiplies a Q31 vector by a scalar.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup scale
- * @{
- */
-
-/**
- * @brief Multiplies a Q31 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
- */
-
-void arm_scale_q31(
- q31_t * pSrc,
- q31_t scaleFract,
- int8_t shift,
- q31_t * pDst,
- uint32_t blockSize)
-{
- int8_t kShift = shift + 1; /* Shift to apply after scaling */
- int8_t sign = (kShift & 0x80);
- uint32_t blkCnt; /* loop counter */
- q31_t in, out;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q31_t in1, in2, in3, in4; /* temporary input variables */
- q31_t out1, out2, out3, out4; /* temporary output variabels */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- if(sign == 0u)
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* read four inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* multiply input with scaler value */
- in1 = ((q63_t) in1 * scaleFract) >> 32;
- in2 = ((q63_t) in2 * scaleFract) >> 32;
- in3 = ((q63_t) in3 * scaleFract) >> 32;
- in4 = ((q63_t) in4 * scaleFract) >> 32;
-
- /* apply shifting */
- out1 = in1 << kShift;
- out2 = in2 << kShift;
-
- /* saturate the results. */
- if(in1 != (out1 >> kShift))
- out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
- if(in2 != (out2 >> kShift))
- out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
- out3 = in3 << kShift;
- out4 = in4 << kShift;
-
- *pDst = out1;
- *(pDst + 1) = out2;
-
- if(in3 != (out3 >> kShift))
- out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
- if(in4 != (out4 >> kShift))
- out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
- /* Store result destination */
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update pointers to process next sampels */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- }
- else
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* read four inputs from source */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* multiply input with scaler value */
- in1 = ((q63_t) in1 * scaleFract) >> 32;
- in2 = ((q63_t) in2 * scaleFract) >> 32;
- in3 = ((q63_t) in3 * scaleFract) >> 32;
- in4 = ((q63_t) in4 * scaleFract) >> 32;
-
- /* apply shifting */
- out1 = in1 >> -kShift;
- out2 = in2 >> -kShift;
-
- out3 = in3 >> -kShift;
- out4 = in4 >> -kShift;
-
- /* Store result destination */
- *pDst = out1;
- *(pDst + 1) = out2;
-
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update pointers to process next sampels */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- if(sign == 0)
- {
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- in = *pSrc++;
- in = ((q63_t) in * scaleFract) >> 32;
-
- out = in << kShift;
-
- if(in != (out >> kShift))
- out = 0x7FFFFFFF ^ (in >> 31);
-
- *pDst++ = out;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- in = *pSrc++;
- in = ((q63_t) in * scaleFract) >> 32;
-
- out = in >> -kShift;
-
- *pDst++ = out;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- }
-}
-
-/**
- * @} end of scale group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_scale_q31.c
+ * Description: Multiplies a Q31 vector by a scalar
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup scale
+ * @{
+ */
+
+/**
+ * @brief Multiplies a Q31 vector by a scalar.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+ * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+ */
+
+void arm_scale_q31(
+ q31_t * pSrc,
+ q31_t scaleFract,
+ int8_t shift,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ int8_t kShift = shift + 1; /* Shift to apply after scaling */
+ int8_t sign = (kShift & 0x80);
+ uint32_t blkCnt; /* loop counter */
+ q31_t in, out;
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ q31_t in1, in2, in3, in4; /* temporary input variables */
+ q31_t out1, out2, out3, out4; /* temporary output variabels */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ if (sign == 0U)
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* read four inputs from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ /* multiply input with scaler value */
+ in1 = ((q63_t) in1 * scaleFract) >> 32;
+ in2 = ((q63_t) in2 * scaleFract) >> 32;
+ in3 = ((q63_t) in3 * scaleFract) >> 32;
+ in4 = ((q63_t) in4 * scaleFract) >> 32;
+
+ /* apply shifting */
+ out1 = in1 << kShift;
+ out2 = in2 << kShift;
+
+ /* saturate the results. */
+ if (in1 != (out1 >> kShift))
+ out1 = 0x7FFFFFFF ^ (in1 >> 31);
+
+ if (in2 != (out2 >> kShift))
+ out2 = 0x7FFFFFFF ^ (in2 >> 31);
+
+ out3 = in3 << kShift;
+ out4 = in4 << kShift;
+
+ *pDst = out1;
+ *(pDst + 1) = out2;
+
+ if (in3 != (out3 >> kShift))
+ out3 = 0x7FFFFFFF ^ (in3 >> 31);
+
+ if (in4 != (out4 >> kShift))
+ out4 = 0x7FFFFFFF ^ (in4 >> 31);
+
+ /* Store result destination */
+ *(pDst + 2) = out3;
+ *(pDst + 3) = out4;
+
+ /* Update pointers to process next sampels */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ }
+ else
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* read four inputs from source */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ /* multiply input with scaler value */
+ in1 = ((q63_t) in1 * scaleFract) >> 32;
+ in2 = ((q63_t) in2 * scaleFract) >> 32;
+ in3 = ((q63_t) in3 * scaleFract) >> 32;
+ in4 = ((q63_t) in4 * scaleFract) >> 32;
+
+ /* apply shifting */
+ out1 = in1 >> -kShift;
+ out2 = in2 >> -kShift;
+
+ out3 = in3 >> -kShift;
+ out4 = in4 >> -kShift;
+
+ /* Store result destination */
+ *pDst = out1;
+ *(pDst + 1) = out2;
+
+ *(pDst + 2) = out3;
+ *(pDst + 3) = out4;
+
+ /* Update pointers to process next sampels */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ if (sign == 0)
+ {
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+
+ out = in << kShift;
+
+ if (in != (out >> kShift))
+ out = 0x7FFFFFFF ^ (in >> 31);
+
+ *pDst++ = out;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ in = *pSrc++;
+ in = ((q63_t) in * scaleFract) >> 32;
+
+ out = in >> -kShift;
+
+ *pDst++ = out;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ }
+}
+
+/**
+ * @} end of scale group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
index bbae6d5..6cf1bbb 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
@@ -1,149 +1,137 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_scale_q7.c
-*
-* Description: Multiplies a Q7 vector by a scalar.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup scale
- * @{
- */
-
-/**
- * @brief Multiplies a Q7 vector by a scalar.
- * @param[in] *pSrc points to the input vector
- * @param[in] scaleFract fractional portion of the scale value
- * @param[in] shift number of bits to shift the result by
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
- * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
- */
-
-void arm_scale_q7(
- q7_t * pSrc,
- q7_t scaleFract,
- int8_t shift,
- q7_t * pDst,
- uint32_t blockSize)
-{
- int8_t kShift = 7 - shift; /* shift to apply after scaling */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* Reading 4 inputs from memory */
- in1 = *pSrc++;
- in2 = *pSrc++;
- in3 = *pSrc++;
- in4 = *pSrc++;
-
- /* C = A * scale */
- /* Scale the inputs and then store the results in the temporary variables. */
- out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
- out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
- out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
- out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
-
- /* Packing the individual outputs into 32bit and storing in
- * destination buffer in single write */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A * scale */
- /* Scale the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of scale group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_scale_q7.c
+ * Description: Multiplies a Q7 vector by a scalar
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup scale
+ * @{
+ */
+
+/**
+ * @brief Multiplies a Q7 vector by a scalar.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] scaleFract fractional portion of the scale value
+ * @param[in] shift number of bits to shift the result by
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
+ * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
+ */
+
+void arm_scale_q7(
+ q7_t * pSrc,
+ q7_t scaleFract,
+ int8_t shift,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ int8_t kShift = 7 - shift; /* shift to apply after scaling */
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* Reading 4 inputs from memory */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ in3 = *pSrc++;
+ in4 = *pSrc++;
+
+ /* C = A * scale */
+ /* Scale the inputs and then store the results in the temporary variables. */
+ out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
+ out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
+ out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
+ out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
+
+ /* Packing the individual outputs into 32bit and storing in
+ * destination buffer in single write */
+ *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A * scale */
+ /* Scale the input and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of scale group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
index 84b1fab..d2cd037 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
@@ -1,248 +1,236 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_shift_q15.c
-*
-* Description: Shifts the elements of a Q15 vector by a specified number of bits.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup shift
- * @{
- */
-
-/**
- * @brief Shifts the elements of a Q15 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_shift_q15(
- q15_t * pSrc,
- int8_t shiftBits,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign; /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- q15_t in1, in2; /* Temporary variables */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
- /* If the shift value is positive then do right shift else left shift */
- if(sign == 0u)
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* Read 2 inputs */
- in1 = *pSrc++;
- in2 = *pSrc++;
- /* C = A << shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
- __SSAT((in2 << shiftBits), 16), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
- __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
- __SSAT((in2 << shiftBits), 16), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
- __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Shift and then store the results in the destination buffer. */
- *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* Read 2 inputs */
- in1 = *pSrc++;
- in2 = *pSrc++;
-
- /* C = A >> shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
- (in2 >> -shiftBits), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
- (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- in1 = *pSrc++;
- in2 = *pSrc++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
- (in2 >> -shiftBits), 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
- (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
- *pDst++ = (*pSrc++ >> -shiftBits);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
- /* If the shift value is positive then do right shift else left shift */
- if(sign == 0u)
- {
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Shift and then store the results in the destination buffer. */
- *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Shift the inputs and then store the results in the destination buffer. */
- *pDst++ = (*pSrc++ >> -shiftBits);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of shift group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_shift_q15.c
+ * Description: Shifts the elements of a Q15 vector by a specified number of bits
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup shift
+ * @{
+ */
+
+/**
+ * @brief Shifts the elements of a Q15 vector a specified number of bits.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ */
+
+void arm_shift_q15(
+ q15_t * pSrc,
+ int8_t shiftBits,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ uint8_t sign; /* Sign of shiftBits */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ q15_t in1, in2; /* Temporary variables */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* Getting the sign of shiftBits */
+ sign = (shiftBits & 0x80);
+
+ /* If the shift value is positive then do right shift else left shift */
+ if (sign == 0U)
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* Read 2 inputs */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+ /* C = A << shiftBits */
+ /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
+ __SSAT((in2 << shiftBits), 16), 16);
+
+#else
+
+ *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
+ __SSAT((in1 << shiftBits), 16), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
+ __SSAT((in2 << shiftBits), 16), 16);
+
+#else
+
+ *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
+ __SSAT((in1 << shiftBits), 16), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Shift and then store the results in the destination buffer. */
+ *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* Read 2 inputs */
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+ /* C = A >> shiftBits */
+ /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
+ (in2 >> -shiftBits), 16);
+
+#else
+
+ *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
+ (in1 >> -shiftBits), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ in1 = *pSrc++;
+ in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+ *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
+ (in2 >> -shiftBits), 16);
+
+#else
+
+ *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
+ (in1 >> -shiftBits), 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift the inputs and then store the results in the destination buffer. */
+ *pDst++ = (*pSrc++ >> -shiftBits);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Getting the sign of shiftBits */
+ sign = (shiftBits & 0x80);
+
+ /* If the shift value is positive then do right shift else left shift */
+ if (sign == 0U)
+ {
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Shift and then store the results in the destination buffer. */
+ *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift the inputs and then store the results in the destination buffer. */
+ *pDst++ = (*pSrc++ >> -shiftBits);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of shift group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
index 5f59f52..7e728d4 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
@@ -1,203 +1,191 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_shift_q31.c
-*
-* Description: Shifts the elements of a Q31 vector by a specified number of bits.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-/**
- * @defgroup shift Vector Shift
- *
- * Shifts the elements of a fixed-point vector by a specified number of bits.
- * There are separate functions for Q7, Q15, and Q31 data types.
- * The underlying algorithm used is:
- *
- * <pre>
- * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
- * </pre>
- *
- * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
- * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
- */
-
-/**
- * @addtogroup shift
- * @{
- */
-
-/**
- * @brief Shifts the elements of a Q31 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
- */
-
-void arm_shift_q31(
- q31_t * pSrc,
- int8_t shiftBits,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
- q31_t in1, in2, in3, in4; /* Temporary input variables */
- q31_t out1, out2, out3, out4; /* Temporary output variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
-
- if(sign == 0u)
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Shift the input and then store the results in the destination buffer. */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- out1 = in1 << shiftBits;
- in3 = *(pSrc + 2);
- out2 = in2 << shiftBits;
- in4 = *(pSrc + 3);
- if(in1 != (out1 >> shiftBits))
- out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
- if(in2 != (out2 >> shiftBits))
- out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
- *pDst = out1;
- out3 = in3 << shiftBits;
- *(pDst + 1) = out2;
- out4 = in4 << shiftBits;
-
- if(in3 != (out3 >> shiftBits))
- out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
- if(in4 != (out4 >> shiftBits))
- out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
- *(pDst + 2) = out3;
- *(pDst + 3) = out4;
-
- /* Update destination pointer to process next sampels */
- pSrc += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Shift the input and then store the results in the destination buffer. */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- *pDst = (in1 >> -shiftBits);
- *(pDst + 1) = (in2 >> -shiftBits);
- *(pDst + 2) = (in3 >> -shiftBits);
- *(pDst + 3) = (in4 >> -shiftBits);
-
-
- pSrc += 4u;
- pDst += 4u;
-
- blkCnt--;
- }
-
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
- while(blkCnt > 0u)
- {
- /* C = A (>> or <<) shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
- (*pSrc++ >> -shiftBits);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-
-}
-
-/**
- * @} end of shift group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_shift_q31.c
+ * Description: Shifts the elements of a Q31 vector by a specified number of bits
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+/**
+ * @defgroup shift Vector Shift
+ *
+ * Shifts the elements of a fixed-point vector by a specified number of bits.
+ * There are separate functions for Q7, Q15, and Q31 data types.
+ * The underlying algorithm used is:
+ *
+ * <pre>
+ * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
+ * </pre>
+ *
+ * If <code>shift</code> is positive then the elements of the vector are shifted to the left.
+ * If <code>shift</code> is negative then the elements of the vector are shifted to the right.
+ *
+ * The functions support in-place computation allowing the source and destination
+ * pointers to reference the same memory buffer.
+ */
+
+/**
+ * @addtogroup shift
+ * @{
+ */
+
+/**
+ * @brief Shifts the elements of a Q31 vector a specified number of bits.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+ */
+
+void arm_shift_q31(
+ q31_t * pSrc,
+ int8_t shiftBits,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
+
+#if defined (ARM_MATH_DSP)
+
+ q31_t in1, in2, in3, in4; /* Temporary input variables */
+ q31_t out1, out2, out3, out4; /* Temporary output variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+
+ if (sign == 0U)
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Shift the input and then store the results in the destination buffer. */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ out1 = in1 << shiftBits;
+ in3 = *(pSrc + 2);
+ out2 = in2 << shiftBits;
+ in4 = *(pSrc + 3);
+ if (in1 != (out1 >> shiftBits))
+ out1 = 0x7FFFFFFF ^ (in1 >> 31);
+
+ if (in2 != (out2 >> shiftBits))
+ out2 = 0x7FFFFFFF ^ (in2 >> 31);
+
+ *pDst = out1;
+ out3 = in3 << shiftBits;
+ *(pDst + 1) = out2;
+ out4 = in4 << shiftBits;
+
+ if (in3 != (out3 >> shiftBits))
+ out3 = 0x7FFFFFFF ^ (in3 >> 31);
+
+ if (in4 != (out4 >> shiftBits))
+ out4 = 0x7FFFFFFF ^ (in4 >> 31);
+
+ *(pDst + 2) = out3;
+ *(pDst + 3) = out4;
+
+ /* Update destination pointer to process next sampels */
+ pSrc += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift the input and then store the results in the destination buffer. */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ *pDst = (in1 >> -shiftBits);
+ *(pDst + 1) = (in2 >> -shiftBits);
+ *(pDst + 2) = (in3 >> -shiftBits);
+ *(pDst + 3) = (in4 >> -shiftBits);
+
+
+ pSrc += 4U;
+ pDst += 4U;
+
+ blkCnt--;
+ }
+
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+ while (blkCnt > 0U)
+ {
+ /* C = A (>> or <<) shiftBits */
+ /* Shift the input and then store the result in the destination buffer. */
+ *pDst++ = (sign == 0U) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
+ (*pSrc++ >> -shiftBits);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+
+}
+
+/**
+ * @} end of shift group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
index 95f5074..fd508b4 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
@@ -1,220 +1,208 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_shift_q7.c
-*
-* Description: Processing function for the Q7 Shifting
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup shift
- * @{
- */
-
-
-/**
- * @brief Shifts the elements of a Q7 vector a specified number of bits.
- * @param[in] *pSrc points to the input vector
- * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in the vector
- * @return none.
- *
- * \par Conditions for optimum performance
- * Input and output buffers should be aligned by 32-bit
- *
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
- */
-
-void arm_shift_q7(
- q7_t * pSrc,
- int8_t shiftBits,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
- uint8_t sign; /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t in1; /* Input value1 */
- q7_t in2; /* Input value2 */
- q7_t in3; /* Input value3 */
- q7_t in4; /* Input value4 */
-
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
- /* If the shift value is positive then do right shift else left shift */
- if(sign == 0u)
- {
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Read 4 inputs */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
- *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
- __SSAT((in2 << shiftBits), 8),
- __SSAT((in3 << shiftBits), 8),
- __SSAT((in4 << shiftBits), 8));
- /* Update source pointer to process next sampels */
- pSrc += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- shiftBits = -shiftBits;
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Read 4 inputs */
- in1 = *pSrc;
- in2 = *(pSrc + 1);
- in3 = *(pSrc + 2);
- in4 = *(pSrc + 3);
-
- /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
- *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
- (in3 >> shiftBits), (in4 >> shiftBits));
-
-
- pSrc += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- in1 = *pSrc++;
- *pDst++ = (in1 >> shiftBits);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Getting the sign of shiftBits */
- sign = (shiftBits & 0x80);
-
- /* If the shift value is positive then do right shift else left shift */
- if(sign == 0u)
- {
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A << shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
- else
- {
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A >> shiftBits */
- /* Shift the input and then store the result in the destination buffer. */
- *pDst++ = (*pSrc++ >> -shiftBits);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-/**
- * @} end of shift group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_shift_q7.c
+ * Description: Processing function for the Q7 Shifting
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup shift
+ * @{
+ */
+
+
+/**
+ * @brief Shifts the elements of a Q7 vector a specified number of bits.
+ * @param[in] *pSrc points to the input vector
+ * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in the vector
+ * @return none.
+ *
+ * \par Conditions for optimum performance
+ * Input and output buffers should be aligned by 32-bit
+ *
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.
+ */
+
+void arm_shift_q7(
+ q7_t * pSrc,
+ int8_t shiftBits,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+ uint8_t sign; /* Sign of shiftBits */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q7_t in1; /* Input value1 */
+ q7_t in2; /* Input value2 */
+ q7_t in3; /* Input value3 */
+ q7_t in4; /* Input value4 */
+
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* Getting the sign of shiftBits */
+ sign = (shiftBits & 0x80);
+
+ /* If the shift value is positive then do right shift else left shift */
+ if (sign == 0U)
+ {
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Read 4 inputs */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
+ *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
+ __SSAT((in2 << shiftBits), 8),
+ __SSAT((in3 << shiftBits), 8),
+ __SSAT((in4 << shiftBits), 8));
+ /* Update source pointer to process next sampels */
+ pSrc += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Shift the input and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+ shiftBits = -shiftBits;
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Read 4 inputs */
+ in1 = *pSrc;
+ in2 = *(pSrc + 1);
+ in3 = *(pSrc + 2);
+ in4 = *(pSrc + 3);
+
+ /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
+ *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
+ (in3 >> shiftBits), (in4 >> shiftBits));
+
+
+ pSrc += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift the input and then store the result in the destination buffer. */
+ in1 = *pSrc++;
+ *pDst++ = (in1 >> shiftBits);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Getting the sign of shiftBits */
+ sign = (shiftBits & 0x80);
+
+ /* If the shift value is positive then do right shift else left shift */
+ if (sign == 0U)
+ {
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A << shiftBits */
+ /* Shift the input and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+ else
+ {
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A >> shiftBits */
+ /* Shift the input and then store the result in the destination buffer. */
+ *pDst++ = (*pSrc++ >> -shiftBits);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+}
+
+/**
+ * @} end of shift group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
index 585f410..74a2944 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
@@ -1,150 +1,138 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_sub_f32.c
-*
-* Description: Floating-point vector subtraction.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @defgroup BasicSub Vector Subtraction
- *
- * Element-by-element subtraction of two vectors.
- *
- * <pre>
- * pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
- * </pre>
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
- * @addtogroup BasicSub
- * @{
- */
-
-
-/**
- * @brief Floating-point vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- */
-
-void arm_sub_f32(
- float32_t * pSrcA,
- float32_t * pSrcB,
- float32_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- float32_t inA1, inA2, inA3, inA4; /* temporary variables */
- float32_t inB1, inB2, inB3, inB4; /* temporary variables */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
- /* Read 4 input samples from sourceA and sourceB */
- inA1 = *pSrcA;
- inB1 = *pSrcB;
- inA2 = *(pSrcA + 1);
- inB2 = *(pSrcB + 1);
- inA3 = *(pSrcA + 2);
- inB3 = *(pSrcB + 2);
- inA4 = *(pSrcA + 3);
- inB4 = *(pSrcB + 3);
-
- /* dst = srcA - srcB */
- /* subtract and store the result */
- *pDst = inA1 - inB1;
- *(pDst + 1) = inA2 - inB2;
- *(pDst + 2) = inA3 - inB3;
- *(pDst + 3) = inA4 - inB4;
-
-
- /* Update pointers to process next sampels */
- pSrcA += 4u;
- pSrcB += 4u;
- pDst += 4u;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
- *pDst++ = (*pSrcA++) - (*pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_sub_f32.c
+ * Description: Floating-point vector subtraction.
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @defgroup BasicSub Vector Subtraction
+ *
+ * Element-by-element subtraction of two vectors.
+ *
+ * <pre>
+ * pDst[n] = pSrcA[n] - pSrcB[n], 0 <= n < blockSize.
+ * </pre>
+ *
+ * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+ * @addtogroup BasicSub
+ * @{
+ */
+
+
+/**
+ * @brief Floating-point vector subtraction.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ */
+
+void arm_sub_f32(
+ float32_t * pSrcA,
+ float32_t * pSrcB,
+ float32_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ float32_t inA1, inA2, inA3, inA4; /* temporary variables */
+ float32_t inB1, inB2, inB3, inB4; /* temporary variables */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the results in the destination buffer. */
+ /* Read 4 input samples from sourceA and sourceB */
+ inA1 = *pSrcA;
+ inB1 = *pSrcB;
+ inA2 = *(pSrcA + 1);
+ inB2 = *(pSrcB + 1);
+ inA3 = *(pSrcA + 2);
+ inB3 = *(pSrcB + 2);
+ inA4 = *(pSrcA + 3);
+ inB4 = *(pSrcB + 3);
+
+ /* dst = srcA - srcB */
+ /* subtract and store the result */
+ *pDst = inA1 - inB1;
+ *(pDst + 1) = inA2 - inB2;
+ *(pDst + 2) = inA3 - inB3;
+ *(pDst + 3) = inA4 - inB4;
+
+
+ /* Update pointers to process next sampels */
+ pSrcA += 4U;
+ pSrcB += 4U;
+ pDst += 4U;
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the results in the destination buffer. */
+ *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+}
+
+/**
+ * @} end of BasicSub group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
index f8b8b17..17942eb 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
@@ -1,140 +1,128 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_sub_q15.c
-*
-* Description: Q15 vector subtraction.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicSub
- * @{
- */
-
-/**
- * @brief Q15 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_sub_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the results in the destination buffer two samples at a time. */
- inA1 = *__SIMD32(pSrcA)++;
- inA2 = *__SIMD32(pSrcA)++;
- inB1 = *__SIMD32(pSrcB)++;
- inB2 = *__SIMD32(pSrcB)++;
-
- *__SIMD32(pDst)++ = __QSUB16(inA1, inB1);
- *__SIMD32(pDst)++ = __QSUB16(inA2, inB2);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**
- * @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_sub_q15.c
+ * Description: Q15 vector subtraction
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicSub
+ * @{
+ */
+
+/**
+ * @brief Q15 vector subtraction.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
+ */
+
+void arm_sub_q15(
+ q15_t * pSrcA,
+ q15_t * pSrcB,
+ q15_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2;
+ q31_t inB1, inB2;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the results in the destination buffer two samples at a time. */
+ inA1 = *__SIMD32(pSrcA)++;
+ inA2 = *__SIMD32(pSrcA)++;
+ inB1 = *__SIMD32(pSrcB)++;
+ inB2 = *__SIMD32(pSrcB)++;
+
+ *__SIMD32(pDst)++ = __QSUB16(inA1, inB1);
+ *__SIMD32(pDst)++ = __QSUB16(inA2, inB2);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+}
+
+/**
+ * @} end of BasicSub group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
index 76f1405..72b8597 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
@@ -1,146 +1,134 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_sub_q31.c
-*
-* Description: Q31 vector subtraction.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicSub
- * @{
- */
-
-/**
- * @brief Q31 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
- */
-
-void arm_sub_q31(
- q31_t * pSrcA,
- q31_t * pSrcB,
- q31_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inA3, inA4;
- q31_t inB1, inB2, inB3, inB4;
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the results in the destination buffer. */
- inA1 = *pSrcA++;
- inA2 = *pSrcA++;
- inB1 = *pSrcB++;
- inB2 = *pSrcB++;
-
- inA3 = *pSrcA++;
- inA4 = *pSrcA++;
- inB3 = *pSrcB++;
- inB4 = *pSrcB++;
-
- *pDst++ = __QSUB(inA1, inB1);
- *pDst++ = __QSUB(inA2, inB2);
- *pDst++ = __QSUB(inA3, inB3);
- *pDst++ = __QSUB(inA4, inB4);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**
- * @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_sub_q31.c
+ * Description: Q31 vector subtraction
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicSub
+ * @{
+ */
+
+/**
+ * @brief Q31 vector subtraction.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
+ */
+
+void arm_sub_q31(
+ q31_t * pSrcA,
+ q31_t * pSrcB,
+ q31_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+ q31_t inA1, inA2, inA3, inA4;
+ q31_t inB1, inB2, inB3, inB4;
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the results in the destination buffer. */
+ inA1 = *pSrcA++;
+ inA2 = *pSrcA++;
+ inB1 = *pSrcB++;
+ inB2 = *pSrcB++;
+
+ inA3 = *pSrcA++;
+ inA4 = *pSrcA++;
+ inB3 = *pSrcB++;
+ inB4 = *pSrcB++;
+
+ *pDst++ = __QSUB(inA1, inB1);
+ *pDst++ = __QSUB(inA2, inB2);
+ *pDst++ = __QSUB(inA3, inB3);
+ *pDst++ = __QSUB(inA4, inB4);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+ * @} end of BasicSub group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
index fa03f64..d211f40 100644
--- a/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
+++ b/libs/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
@@ -1,131 +1,119 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 12. March 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_sub_q7.c
-*
-* Description: Q7 vector subtraction.
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMath
- */
-
-/**
- * @addtogroup BasicSub
- * @{
- */
-
-/**
- * @brief Q7 vector subtraction.
- * @param[in] *pSrcA points to the first input vector
- * @param[in] *pSrcB points to the second input vector
- * @param[out] *pDst points to the output vector
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_sub_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the results in the destination buffer 4 samples at a time. */
- *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
- while(blkCnt > 0u)
- {
- /* C = A - B */
- /* Subtract and then store the result in the destination buffer. */
- *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**
- * @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project: CMSIS DSP Library
+ * Title: arm_sub_q7.c
+ * Description: Q7 vector subtraction
+ *
+ * $Date: 27. January 2017
+ * $Revision: V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMath
+ */
+
+/**
+ * @addtogroup BasicSub
+ * @{
+ */
+
+/**
+ * @brief Q7 vector subtraction.
+ * @param[in] *pSrcA points to the first input vector
+ * @param[in] *pSrcB points to the second input vector
+ * @param[out] *pDst points to the output vector
+ * @param[in] blockSize number of samples in each vector
+ * @return none.
+ *
+ * <b>Scaling and Overflow Behavior:</b>
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ */
+
+void arm_sub_q7(
+ q7_t * pSrcA,
+ q7_t * pSrcB,
+ q7_t * pDst,
+ uint32_t blockSize)
+{
+ uint32_t blkCnt; /* loop counter */
+
+#if defined (ARM_MATH_DSP)
+
+/* Run the below code for Cortex-M4 and Cortex-M3 */
+
+ /*loop Unrolling */
+ blkCnt = blockSize >> 2U;
+
+ /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+ ** a second loop below computes the remaining 1 to 3 samples. */
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the results in the destination buffer 4 samples at a time. */
+ *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+ /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+ ** No loop unrolling is used. */
+ blkCnt = blockSize % 0x4U;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#else
+
+ /* Run the below code for Cortex-M0 */
+
+ /* Initialize blkCnt with number of samples */
+ blkCnt = blockSize;
+
+ while (blkCnt > 0U)
+ {
+ /* C = A - B */
+ /* Subtract and then store the result in the destination buffer. */
+ *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
+
+ /* Decrement the loop counter */
+ blkCnt--;
+ }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+
+}
+
+/**
+ * @} end of BasicSub group
+ */
diff --git a/libs/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c b/libs/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
index 07b68d3..1f8f589 100644
--- a/libs/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
+++ b/libs/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
@@ -1,27251 +1,22176 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date: 31. July 2014
-* $Revision: V1.4.4
-*
-* Project: CMSIS DSP Library
-* Title: arm_common_tables.c
-*
-* Description: This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
- * @ingroup groupTransforms
- */
-
-/**
- * @addtogroup CFFT_CIFFT Complex FFT Tables
- * @{
- */
-
-/**
-* \par
-* Pseudo code for Generation of Bit reversal Table is
-* \par
-* <pre>for(l=1;l <= N/4;l++)
-* {
-* for(i=0;i<logN2;i++)
-* {
-* a[i]=l&(1<<i);
-* }
-* for(j=0; j<logN2; j++)
-* {
-* if (a[j]!=0)
-* y[l]+=(1<<((logN2-1)-j));
-* }
-* y[l] = y[l] >> 1;
-* } </pre>
-* \par
-* where N = 4096 logN2 = 12
-* \par
-* N is the maximum FFT Size supported
-*/
-
-/*
-* @brief Table for bit reversal process
-*/
-const uint16_t armBitRevTable[1024] = {
- 0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x80, 0x480, 0x280,
- 0x680, 0x180, 0x580, 0x380, 0x780, 0x40, 0x440, 0x240, 0x640, 0x140,
- 0x540, 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
- 0x7c0, 0x20, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0xa0,
- 0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, 0x260,
- 0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
- 0x5e0, 0x3e0, 0x7e0, 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
- 0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x50,
- 0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0,
- 0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, 0x630, 0x130,
- 0x530, 0x330, 0x730, 0xb0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
- 0x7b0, 0x70, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0xf0,
- 0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x8, 0x408, 0x208,
- 0x608, 0x108, 0x508, 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188,
- 0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
- 0x748, 0xc8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28,
- 0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, 0x4a8, 0x2a8,
- 0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x68, 0x468, 0x268, 0x668, 0x168,
- 0x568, 0x368, 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
- 0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x98,
- 0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258,
- 0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
- 0x5d8, 0x3d8, 0x7d8, 0x38, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
- 0x738, 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x78,
- 0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0xf8, 0x4f8, 0x2f8,
- 0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, 0x104,
- 0x504, 0x304, 0x704, 0x84, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
- 0x784, 0x44, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4,
- 0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x24, 0x424, 0x224,
- 0x624, 0x124, 0x524, 0x324, 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
- 0x5a4, 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
- 0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14,
- 0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, 0x294,
- 0x694, 0x194, 0x594, 0x394, 0x794, 0x54, 0x454, 0x254, 0x654, 0x154,
- 0x554, 0x354, 0x754, 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
- 0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0xb4,
- 0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274,
- 0x674, 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
- 0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
- 0x70c, 0x8c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x4c,
- 0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0xcc, 0x4cc, 0x2cc,
- 0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c,
- 0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
- 0x7ac, 0x6c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec,
- 0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, 0x41c, 0x21c,
- 0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x9c, 0x49c, 0x29c, 0x69c, 0x19c,
- 0x59c, 0x39c, 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
- 0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x3c,
- 0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc,
- 0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, 0x27c, 0x67c, 0x17c,
- 0x57c, 0x37c, 0x77c, 0xfc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
- 0x7fc, 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x82,
- 0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x42, 0x442, 0x242,
- 0x642, 0x142, 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
- 0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
- 0x722, 0xa2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62,
- 0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0xe2, 0x4e2, 0x2e2,
- 0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112,
- 0x512, 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
- 0x792, 0x52, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0xd2,
- 0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, 0x232,
- 0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
- 0x5b2, 0x3b2, 0x7b2, 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
- 0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0xa,
- 0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a,
- 0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, 0x64a, 0x14a,
- 0x54a, 0x34a, 0x74a, 0xca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
- 0x7ca, 0x2a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0xaa,
- 0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x6a, 0x46a, 0x26a,
- 0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
- 0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
- 0x71a, 0x9a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
- 0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, 0x4da, 0x2da,
- 0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x3a, 0x43a, 0x23a, 0x63a, 0x13a,
- 0x53a, 0x33a, 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
- 0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0xfa,
- 0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206,
- 0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, 0x286, 0x686, 0x186,
- 0x586, 0x386, 0x786, 0x46, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
- 0x746, 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x26,
- 0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0xa6, 0x4a6, 0x2a6,
- 0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, 0x166,
- 0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
- 0x7e6, 0x16, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96,
- 0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x56, 0x456, 0x256,
- 0x656, 0x156, 0x556, 0x356, 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
- 0x5d6, 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
- 0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76,
- 0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, 0x2f6,
- 0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, 0x40e, 0x20e, 0x60e, 0x10e,
- 0x50e, 0x30e, 0x70e, 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
- 0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0xce,
- 0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e,
- 0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
- 0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
- 0x76e, 0xee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x1e,
- 0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x9e, 0x49e, 0x29e,
- 0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e,
- 0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
- 0x7de, 0x3e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe,
- 0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, 0x47e, 0x27e,
- 0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
- 0x5fe, 0x3fe, 0x7fe, 0x1
-};
-
-
-/*
-* @brief Floating-point Twiddle factors Table Generation
-*/
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 16 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_16[32] = {
- 1.000000000f, 0.000000000f,
- 0.923879533f, 0.382683432f,
- 0.707106781f, 0.707106781f,
- 0.382683432f, 0.923879533f,
- 0.000000000f, 1.000000000f,
- -0.382683432f, 0.923879533f,
- -0.707106781f, 0.707106781f,
- -0.923879533f, 0.382683432f,
- -1.000000000f, 0.000000000f,
- -0.923879533f, -0.382683432f,
- -0.707106781f, -0.707106781f,
- -0.382683432f, -0.923879533f,
- -0.000000000f, -1.000000000f,
- 0.382683432f, -0.923879533f,
- 0.707106781f, -0.707106781f,
- 0.923879533f, -0.382683432f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 32 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_32[64] = {
- 1.000000000f, 0.000000000f,
- 0.980785280f, 0.195090322f,
- 0.923879533f, 0.382683432f,
- 0.831469612f, 0.555570233f,
- 0.707106781f, 0.707106781f,
- 0.555570233f, 0.831469612f,
- 0.382683432f, 0.923879533f,
- 0.195090322f, 0.980785280f,
- 0.000000000f, 1.000000000f,
- -0.195090322f, 0.980785280f,
- -0.382683432f, 0.923879533f,
- -0.555570233f, 0.831469612f,
- -0.707106781f, 0.707106781f,
- -0.831469612f, 0.555570233f,
- -0.923879533f, 0.382683432f,
- -0.980785280f, 0.195090322f,
- -1.000000000f, 0.000000000f,
- -0.980785280f, -0.195090322f,
- -0.923879533f, -0.382683432f,
- -0.831469612f, -0.555570233f,
- -0.707106781f, -0.707106781f,
- -0.555570233f, -0.831469612f,
- -0.382683432f, -0.923879533f,
- -0.195090322f, -0.980785280f,
- -0.000000000f, -1.000000000f,
- 0.195090322f, -0.980785280f,
- 0.382683432f, -0.923879533f,
- 0.555570233f, -0.831469612f,
- 0.707106781f, -0.707106781f,
- 0.831469612f, -0.555570233f,
- 0.923879533f, -0.382683432f,
- 0.980785280f, -0.195090322f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 64 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_64[128] = {
- 1.000000000f, 0.000000000f,
- 0.995184727f, 0.098017140f,
- 0.980785280f, 0.195090322f,
- 0.956940336f, 0.290284677f,
- 0.923879533f, 0.382683432f,
- 0.881921264f, 0.471396737f,
- 0.831469612f, 0.555570233f,
- 0.773010453f, 0.634393284f,
- 0.707106781f, 0.707106781f,
- 0.634393284f, 0.773010453f,
- 0.555570233f, 0.831469612f,
- 0.471396737f, 0.881921264f,
- 0.382683432f, 0.923879533f,
- 0.290284677f, 0.956940336f,
- 0.195090322f, 0.980785280f,
- 0.098017140f, 0.995184727f,
- 0.000000000f, 1.000000000f,
- -0.098017140f, 0.995184727f,
- -0.195090322f, 0.980785280f,
- -0.290284677f, 0.956940336f,
- -0.382683432f, 0.923879533f,
- -0.471396737f, 0.881921264f,
- -0.555570233f, 0.831469612f,
- -0.634393284f, 0.773010453f,
- -0.707106781f, 0.707106781f,
- -0.773010453f, 0.634393284f,
- -0.831469612f, 0.555570233f,
- -0.881921264f, 0.471396737f,
- -0.923879533f, 0.382683432f,
- -0.956940336f, 0.290284677f,
- -0.980785280f, 0.195090322f,
- -0.995184727f, 0.098017140f,
- -1.000000000f, 0.000000000f,
- -0.995184727f, -0.098017140f,
- -0.980785280f, -0.195090322f,
- -0.956940336f, -0.290284677f,
- -0.923879533f, -0.382683432f,
- -0.881921264f, -0.471396737f,
- -0.831469612f, -0.555570233f,
- -0.773010453f, -0.634393284f,
- -0.707106781f, -0.707106781f,
- -0.634393284f, -0.773010453f,
- -0.555570233f, -0.831469612f,
- -0.471396737f, -0.881921264f,
- -0.382683432f, -0.923879533f,
- -0.290284677f, -0.956940336f,
- -0.195090322f, -0.980785280f,
- -0.098017140f, -0.995184727f,
- -0.000000000f, -1.000000000f,
- 0.098017140f, -0.995184727f,
- 0.195090322f, -0.980785280f,
- 0.290284677f, -0.956940336f,
- 0.382683432f, -0.923879533f,
- 0.471396737f, -0.881921264f,
- 0.555570233f, -0.831469612f,
- 0.634393284f, -0.773010453f,
- 0.707106781f, -0.707106781f,
- 0.773010453f, -0.634393284f,
- 0.831469612f, -0.555570233f,
- 0.881921264f, -0.471396737f,
- 0.923879533f, -0.382683432f,
- 0.956940336f, -0.290284677f,
- 0.980785280f, -0.195090322f,
- 0.995184727f, -0.098017140f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 128 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-
-const float32_t twiddleCoef_128[256] = {
- 1.000000000f , 0.000000000f ,
- 0.998795456f , 0.049067674f ,
- 0.995184727f , 0.098017140f ,
- 0.989176510f , 0.146730474f ,
- 0.980785280f , 0.195090322f ,
- 0.970031253f , 0.242980180f ,
- 0.956940336f , 0.290284677f ,
- 0.941544065f , 0.336889853f ,
- 0.923879533f , 0.382683432f ,
- 0.903989293f , 0.427555093f ,
- 0.881921264f , 0.471396737f ,
- 0.857728610f , 0.514102744f ,
- 0.831469612f , 0.555570233f ,
- 0.803207531f , 0.595699304f ,
- 0.773010453f , 0.634393284f ,
- 0.740951125f , 0.671558955f ,
- 0.707106781f , 0.707106781f ,
- 0.671558955f , 0.740951125f ,
- 0.634393284f , 0.773010453f ,
- 0.595699304f , 0.803207531f ,
- 0.555570233f , 0.831469612f ,
- 0.514102744f , 0.857728610f ,
- 0.471396737f , 0.881921264f ,
- 0.427555093f , 0.903989293f ,
- 0.382683432f , 0.923879533f ,
- 0.336889853f , 0.941544065f ,
- 0.290284677f , 0.956940336f ,
- 0.242980180f , 0.970031253f ,
- 0.195090322f , 0.980785280f ,
- 0.146730474f , 0.989176510f ,
- 0.098017140f , 0.995184727f ,
- 0.049067674f , 0.998795456f ,
- 0.000000000f , 1.000000000f ,
- -0.049067674f , 0.998795456f ,
- -0.098017140f , 0.995184727f ,
- -0.146730474f , 0.989176510f ,
- -0.195090322f , 0.980785280f ,
- -0.242980180f , 0.970031253f ,
- -0.290284677f , 0.956940336f ,
- -0.336889853f , 0.941544065f ,
- -0.382683432f , 0.923879533f ,
- -0.427555093f , 0.903989293f ,
- -0.471396737f , 0.881921264f ,
- -0.514102744f , 0.857728610f ,
- -0.555570233f , 0.831469612f ,
- -0.595699304f , 0.803207531f ,
- -0.634393284f , 0.773010453f ,
- -0.671558955f , 0.740951125f ,
- -0.707106781f , 0.707106781f ,
- -0.740951125f , 0.671558955f ,
- -0.773010453f , 0.634393284f ,
- -0.803207531f , 0.595699304f ,
- -0.831469612f , 0.555570233f ,
- -0.857728610f , 0.514102744f ,
- -0.881921264f , 0.471396737f ,
- -0.903989293f , 0.427555093f ,
- -0.923879533f , 0.382683432f ,
- -0.941544065f , 0.336889853f ,
- -0.956940336f , 0.290284677f ,
- -0.970031253f , 0.242980180f ,
- -0.980785280f , 0.195090322f ,
- -0.989176510f , 0.146730474f ,
- -0.995184727f , 0.098017140f ,
- -0.998795456f , 0.049067674f ,
- -1.000000000f , 0.000000000f ,
- -0.998795456f , -0.049067674f ,
- -0.995184727f , -0.098017140f ,
- -0.989176510f , -0.146730474f ,
- -0.980785280f , -0.195090322f ,
- -0.970031253f , -0.242980180f ,
- -0.956940336f , -0.290284677f ,
- -0.941544065f , -0.336889853f ,
- -0.923879533f , -0.382683432f ,
- -0.903989293f , -0.427555093f ,
- -0.881921264f , -0.471396737f ,
- -0.857728610f , -0.514102744f ,
- -0.831469612f , -0.555570233f ,
- -0.803207531f , -0.595699304f ,
- -0.773010453f , -0.634393284f ,
- -0.740951125f , -0.671558955f ,
- -0.707106781f , -0.707106781f ,
- -0.671558955f , -0.740951125f ,
- -0.634393284f , -0.773010453f ,
- -0.595699304f , -0.803207531f ,
- -0.555570233f , -0.831469612f ,
- -0.514102744f , -0.857728610f ,
- -0.471396737f , -0.881921264f ,
- -0.427555093f , -0.903989293f ,
- -0.382683432f , -0.923879533f ,
- -0.336889853f , -0.941544065f ,
- -0.290284677f , -0.956940336f ,
- -0.242980180f , -0.970031253f ,
- -0.195090322f , -0.980785280f ,
- -0.146730474f , -0.989176510f ,
- -0.098017140f , -0.995184727f ,
- -0.049067674f , -0.998795456f ,
- -0.000000000f , -1.000000000f ,
- 0.049067674f , -0.998795456f ,
- 0.098017140f , -0.995184727f ,
- 0.146730474f , -0.989176510f ,
- 0.195090322f , -0.980785280f ,
- 0.242980180f , -0.970031253f ,
- 0.290284677f , -0.956940336f ,
- 0.336889853f , -0.941544065f ,
- 0.382683432f , -0.923879533f ,
- 0.427555093f , -0.903989293f ,
- 0.471396737f , -0.881921264f ,
- 0.514102744f , -0.857728610f ,
- 0.555570233f , -0.831469612f ,
- 0.595699304f , -0.803207531f ,
- 0.634393284f , -0.773010453f ,
- 0.671558955f , -0.740951125f ,
- 0.707106781f , -0.707106781f ,
- 0.740951125f , -0.671558955f ,
- 0.773010453f , -0.634393284f ,
- 0.803207531f , -0.595699304f ,
- 0.831469612f , -0.555570233f ,
- 0.857728610f , -0.514102744f ,
- 0.881921264f , -0.471396737f ,
- 0.903989293f , -0.427555093f ,
- 0.923879533f , -0.382683432f ,
- 0.941544065f , -0.336889853f ,
- 0.956940336f , -0.290284677f ,
- 0.970031253f , -0.242980180f ,
- 0.980785280f , -0.195090322f ,
- 0.989176510f , -0.146730474f ,
- 0.995184727f , -0.098017140f ,
- 0.998795456f , -0.049067674f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 256 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_256[512] = {
- 1.000000000f, 0.000000000f,
- 0.999698819f, 0.024541229f,
- 0.998795456f, 0.049067674f,
- 0.997290457f, 0.073564564f,
- 0.995184727f, 0.098017140f,
- 0.992479535f, 0.122410675f,
- 0.989176510f, 0.146730474f,
- 0.985277642f, 0.170961889f,
- 0.980785280f, 0.195090322f,
- 0.975702130f, 0.219101240f,
- 0.970031253f, 0.242980180f,
- 0.963776066f, 0.266712757f,
- 0.956940336f, 0.290284677f,
- 0.949528181f, 0.313681740f,
- 0.941544065f, 0.336889853f,
- 0.932992799f, 0.359895037f,
- 0.923879533f, 0.382683432f,
- 0.914209756f, 0.405241314f,
- 0.903989293f, 0.427555093f,
- 0.893224301f, 0.449611330f,
- 0.881921264f, 0.471396737f,
- 0.870086991f, 0.492898192f,
- 0.857728610f, 0.514102744f,
- 0.844853565f, 0.534997620f,
- 0.831469612f, 0.555570233f,
- 0.817584813f, 0.575808191f,
- 0.803207531f, 0.595699304f,
- 0.788346428f, 0.615231591f,
- 0.773010453f, 0.634393284f,
- 0.757208847f, 0.653172843f,
- 0.740951125f, 0.671558955f,
- 0.724247083f, 0.689540545f,
- 0.707106781f, 0.707106781f,
- 0.689540545f, 0.724247083f,
- 0.671558955f, 0.740951125f,
- 0.653172843f, 0.757208847f,
- 0.634393284f, 0.773010453f,
- 0.615231591f, 0.788346428f,
- 0.595699304f, 0.803207531f,
- 0.575808191f, 0.817584813f,
- 0.555570233f, 0.831469612f,
- 0.534997620f, 0.844853565f,
- 0.514102744f, 0.857728610f,
- 0.492898192f, 0.870086991f,
- 0.471396737f, 0.881921264f,
- 0.449611330f, 0.893224301f,
- 0.427555093f, 0.903989293f,
- 0.405241314f, 0.914209756f,
- 0.382683432f, 0.923879533f,
- 0.359895037f, 0.932992799f,
- 0.336889853f, 0.941544065f,
- 0.313681740f, 0.949528181f,
- 0.290284677f, 0.956940336f,
- 0.266712757f, 0.963776066f,
- 0.242980180f, 0.970031253f,
- 0.219101240f, 0.975702130f,
- 0.195090322f, 0.980785280f,
- 0.170961889f, 0.985277642f,
- 0.146730474f, 0.989176510f,
- 0.122410675f, 0.992479535f,
- 0.098017140f, 0.995184727f,
- 0.073564564f, 0.997290457f,
- 0.049067674f, 0.998795456f,
- 0.024541229f, 0.999698819f,
- 0.000000000f, 1.000000000f,
- -0.024541229f, 0.999698819f,
- -0.049067674f, 0.998795456f,
- -0.073564564f, 0.997290457f,
- -0.098017140f, 0.995184727f,
- -0.122410675f, 0.992479535f,
- -0.146730474f, 0.989176510f,
- -0.170961889f, 0.985277642f,
- -0.195090322f, 0.980785280f,
- -0.219101240f, 0.975702130f,
- -0.242980180f, 0.970031253f,
- -0.266712757f, 0.963776066f,
- -0.290284677f, 0.956940336f,
- -0.313681740f, 0.949528181f,
- -0.336889853f, 0.941544065f,
- -0.359895037f, 0.932992799f,
- -0.382683432f, 0.923879533f,
- -0.405241314f, 0.914209756f,
- -0.427555093f, 0.903989293f,
- -0.449611330f, 0.893224301f,
- -0.471396737f, 0.881921264f,
- -0.492898192f, 0.870086991f,
- -0.514102744f, 0.857728610f,
- -0.534997620f, 0.844853565f,
- -0.555570233f, 0.831469612f,
- -0.575808191f, 0.817584813f,
- -0.595699304f, 0.803207531f,
- -0.615231591f, 0.788346428f,
- -0.634393284f, 0.773010453f,
- -0.653172843f, 0.757208847f,
- -0.671558955f, 0.740951125f,
- -0.689540545f, 0.724247083f,
- -0.707106781f, 0.707106781f,
- -0.724247083f, 0.689540545f,
- -0.740951125f, 0.671558955f,
- -0.757208847f, 0.653172843f,
- -0.773010453f, 0.634393284f,
- -0.788346428f, 0.615231591f,
- -0.803207531f, 0.595699304f,
- -0.817584813f, 0.575808191f,
- -0.831469612f, 0.555570233f,
- -0.844853565f, 0.534997620f,
- -0.857728610f, 0.514102744f,
- -0.870086991f, 0.492898192f,
- -0.881921264f, 0.471396737f,
- -0.893224301f, 0.449611330f,
- -0.903989293f, 0.427555093f,
- -0.914209756f, 0.405241314f,
- -0.923879533f, 0.382683432f,
- -0.932992799f, 0.359895037f,
- -0.941544065f, 0.336889853f,
- -0.949528181f, 0.313681740f,
- -0.956940336f, 0.290284677f,
- -0.963776066f, 0.266712757f,
- -0.970031253f, 0.242980180f,
- -0.975702130f, 0.219101240f,
- -0.980785280f, 0.195090322f,
- -0.985277642f, 0.170961889f,
- -0.989176510f, 0.146730474f,
- -0.992479535f, 0.122410675f,
- -0.995184727f, 0.098017140f,
- -0.997290457f, 0.073564564f,
- -0.998795456f, 0.049067674f,
- -0.999698819f, 0.024541229f,
- -1.000000000f, 0.000000000f,
- -0.999698819f, -0.024541229f,
- -0.998795456f, -0.049067674f,
- -0.997290457f, -0.073564564f,
- -0.995184727f, -0.098017140f,
- -0.992479535f, -0.122410675f,
- -0.989176510f, -0.146730474f,
- -0.985277642f, -0.170961889f,
- -0.980785280f, -0.195090322f,
- -0.975702130f, -0.219101240f,
- -0.970031253f, -0.242980180f,
- -0.963776066f, -0.266712757f,
- -0.956940336f, -0.290284677f,
- -0.949528181f, -0.313681740f,
- -0.941544065f, -0.336889853f,
- -0.932992799f, -0.359895037f,
- -0.923879533f, -0.382683432f,
- -0.914209756f, -0.405241314f,
- -0.903989293f, -0.427555093f,
- -0.893224301f, -0.449611330f,
- -0.881921264f, -0.471396737f,
- -0.870086991f, -0.492898192f,
- -0.857728610f, -0.514102744f,
- -0.844853565f, -0.534997620f,
- -0.831469612f, -0.555570233f,
- -0.817584813f, -0.575808191f,
- -0.803207531f, -0.595699304f,
- -0.788346428f, -0.615231591f,
- -0.773010453f, -0.634393284f,
- -0.757208847f, -0.653172843f,
- -0.740951125f, -0.671558955f,
- -0.724247083f, -0.689540545f,
- -0.707106781f, -0.707106781f,
- -0.689540545f, -0.724247083f,
- -0.671558955f, -0.740951125f,
- -0.653172843f, -0.757208847f,
- -0.634393284f, -0.773010453f,
- -0.615231591f, -0.788346428f,
- -0.595699304f, -0.803207531f,
- -0.575808191f, -0.817584813f,
- -0.555570233f, -0.831469612f,
- -0.534997620f, -0.844853565f,
- -0.514102744f, -0.857728610f,
- -0.492898192f, -0.870086991f,
- -0.471396737f, -0.881921264f,
- -0.449611330f, -0.893224301f,
- -0.427555093f, -0.903989293f,
- -0.405241314f, -0.914209756f,
- -0.382683432f, -0.923879533f,
- -0.359895037f, -0.932992799f,
- -0.336889853f, -0.941544065f,
- -0.313681740f, -0.949528181f,
- -0.290284677f, -0.956940336f,
- -0.266712757f, -0.963776066f,
- -0.242980180f, -0.970031253f,
- -0.219101240f, -0.975702130f,
- -0.195090322f, -0.980785280f,
- -0.170961889f, -0.985277642f,
- -0.146730474f, -0.989176510f,
- -0.122410675f, -0.992479535f,
- -0.098017140f, -0.995184727f,
- -0.073564564f, -0.997290457f,
- -0.049067674f, -0.998795456f,
- -0.024541229f, -0.999698819f,
- -0.000000000f, -1.000000000f,
- 0.024541229f, -0.999698819f,
- 0.049067674f, -0.998795456f,
- 0.073564564f, -0.997290457f,
- 0.098017140f, -0.995184727f,
- 0.122410675f, -0.992479535f,
- 0.146730474f, -0.989176510f,
- 0.170961889f, -0.985277642f,
- 0.195090322f, -0.980785280f,
- 0.219101240f, -0.975702130f,
- 0.242980180f, -0.970031253f,
- 0.266712757f, -0.963776066f,
- 0.290284677f, -0.956940336f,
- 0.313681740f, -0.949528181f,
- 0.336889853f, -0.941544065f,
- 0.359895037f, -0.932992799f,
- 0.382683432f, -0.923879533f,
- 0.405241314f, -0.914209756f,
- 0.427555093f, -0.903989293f,
- 0.449611330f, -0.893224301f,
- 0.471396737f, -0.881921264f,
- 0.492898192f, -0.870086991f,
- 0.514102744f, -0.857728610f,
- 0.534997620f, -0.844853565f,
- 0.555570233f, -0.831469612f,
- 0.575808191f, -0.817584813f,
- 0.595699304f, -0.803207531f,
- 0.615231591f, -0.788346428f,
- 0.634393284f, -0.773010453f,
- 0.653172843f, -0.757208847f,
- 0.671558955f, -0.740951125f,
- 0.689540545f, -0.724247083f,
- 0.707106781f, -0.707106781f,
- 0.724247083f, -0.689540545f,
- 0.740951125f, -0.671558955f,
- 0.757208847f, -0.653172843f,
- 0.773010453f, -0.634393284f,
- 0.788346428f, -0.615231591f,
- 0.803207531f, -0.595699304f,
- 0.817584813f, -0.575808191f,
- 0.831469612f, -0.555570233f,
- 0.844853565f, -0.534997620f,
- 0.857728610f, -0.514102744f,
- 0.870086991f, -0.492898192f,
- 0.881921264f, -0.471396737f,
- 0.893224301f, -0.449611330f,
- 0.903989293f, -0.427555093f,
- 0.914209756f, -0.405241314f,
- 0.923879533f, -0.382683432f,
- 0.932992799f, -0.359895037f,
- 0.941544065f, -0.336889853f,
- 0.949528181f, -0.313681740f,
- 0.956940336f, -0.290284677f,
- 0.963776066f, -0.266712757f,
- 0.970031253f, -0.242980180f,
- 0.975702130f, -0.219101240f,
- 0.980785280f, -0.195090322f,
- 0.985277642f, -0.170961889f,
- 0.989176510f, -0.146730474f,
- 0.992479535f, -0.122410675f,
- 0.995184727f, -0.098017140f,
- 0.997290457f, -0.073564564f,
- 0.998795456f, -0.049067674f,
- 0.999698819f, -0.024541229f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 512 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_512[1024] = {
- 1.000000000f, 0.000000000f,
- 0.999924702f, 0.012271538f,
- 0.999698819f, 0.024541229f,
- 0.999322385f, 0.036807223f,
- 0.998795456f, 0.049067674f,
- 0.998118113f, 0.061320736f,
- 0.997290457f, 0.073564564f,
- 0.996312612f, 0.085797312f,
- 0.995184727f, 0.098017140f,
- 0.993906970f, 0.110222207f,
- 0.992479535f, 0.122410675f,
- 0.990902635f, 0.134580709f,
- 0.989176510f, 0.146730474f,
- 0.987301418f, 0.158858143f,
- 0.985277642f, 0.170961889f,
- 0.983105487f, 0.183039888f,
- 0.980785280f, 0.195090322f,
- 0.978317371f, 0.207111376f,
- 0.975702130f, 0.219101240f,
- 0.972939952f, 0.231058108f,
- 0.970031253f, 0.242980180f,
- 0.966976471f, 0.254865660f,
- 0.963776066f, 0.266712757f,
- 0.960430519f, 0.278519689f,
- 0.956940336f, 0.290284677f,
- 0.953306040f, 0.302005949f,
- 0.949528181f, 0.313681740f,
- 0.945607325f, 0.325310292f,
- 0.941544065f, 0.336889853f,
- 0.937339012f, 0.348418680f,
- 0.932992799f, 0.359895037f,
- 0.928506080f, 0.371317194f,
- 0.923879533f, 0.382683432f,
- 0.919113852f, 0.393992040f,
- 0.914209756f, 0.405241314f,
- 0.909167983f, 0.416429560f,
- 0.903989293f, 0.427555093f,
- 0.898674466f, 0.438616239f,
- 0.893224301f, 0.449611330f,
- 0.887639620f, 0.460538711f,
- 0.881921264f, 0.471396737f,
- 0.876070094f, 0.482183772f,
- 0.870086991f, 0.492898192f,
- 0.863972856f, 0.503538384f,
- 0.857728610f, 0.514102744f,
- 0.851355193f, 0.524589683f,
- 0.844853565f, 0.534997620f,
- 0.838224706f, 0.545324988f,
- 0.831469612f, 0.555570233f,
- 0.824589303f, 0.565731811f,
- 0.817584813f, 0.575808191f,
- 0.810457198f, 0.585797857f,
- 0.803207531f, 0.595699304f,
- 0.795836905f, 0.605511041f,
- 0.788346428f, 0.615231591f,
- 0.780737229f, 0.624859488f,
- 0.773010453f, 0.634393284f,
- 0.765167266f, 0.643831543f,
- 0.757208847f, 0.653172843f,
- 0.749136395f, 0.662415778f,
- 0.740951125f, 0.671558955f,
- 0.732654272f, 0.680600998f,
- 0.724247083f, 0.689540545f,
- 0.715730825f, 0.698376249f,
- 0.707106781f, 0.707106781f,
- 0.698376249f, 0.715730825f,
- 0.689540545f, 0.724247083f,
- 0.680600998f, 0.732654272f,
- 0.671558955f, 0.740951125f,
- 0.662415778f, 0.749136395f,
- 0.653172843f, 0.757208847f,
- 0.643831543f, 0.765167266f,
- 0.634393284f, 0.773010453f,
- 0.624859488f, 0.780737229f,
- 0.615231591f, 0.788346428f,
- 0.605511041f, 0.795836905f,
- 0.595699304f, 0.803207531f,
- 0.585797857f, 0.810457198f,
- 0.575808191f, 0.817584813f,
- 0.565731811f, 0.824589303f,
- 0.555570233f, 0.831469612f,
- 0.545324988f, 0.838224706f,
- 0.534997620f, 0.844853565f,
- 0.524589683f, 0.851355193f,
- 0.514102744f, 0.857728610f,
- 0.503538384f, 0.863972856f,
- 0.492898192f, 0.870086991f,
- 0.482183772f, 0.876070094f,
- 0.471396737f, 0.881921264f,
- 0.460538711f, 0.887639620f,
- 0.449611330f, 0.893224301f,
- 0.438616239f, 0.898674466f,
- 0.427555093f, 0.903989293f,
- 0.416429560f, 0.909167983f,
- 0.405241314f, 0.914209756f,
- 0.393992040f, 0.919113852f,
- 0.382683432f, 0.923879533f,
- 0.371317194f, 0.928506080f,
- 0.359895037f, 0.932992799f,
- 0.348418680f, 0.937339012f,
- 0.336889853f, 0.941544065f,
- 0.325310292f, 0.945607325f,
- 0.313681740f, 0.949528181f,
- 0.302005949f, 0.953306040f,
- 0.290284677f, 0.956940336f,
- 0.278519689f, 0.960430519f,
- 0.266712757f, 0.963776066f,
- 0.254865660f, 0.966976471f,
- 0.242980180f, 0.970031253f,
- 0.231058108f, 0.972939952f,
- 0.219101240f, 0.975702130f,
- 0.207111376f, 0.978317371f,
- 0.195090322f, 0.980785280f,
- 0.183039888f, 0.983105487f,
- 0.170961889f, 0.985277642f,
- 0.158858143f, 0.987301418f,
- 0.146730474f, 0.989176510f,
- 0.134580709f, 0.990902635f,
- 0.122410675f, 0.992479535f,
- 0.110222207f, 0.993906970f,
- 0.098017140f, 0.995184727f,
- 0.085797312f, 0.996312612f,
- 0.073564564f, 0.997290457f,
- 0.061320736f, 0.998118113f,
- 0.049067674f, 0.998795456f,
- 0.036807223f, 0.999322385f,
- 0.024541229f, 0.999698819f,
- 0.012271538f, 0.999924702f,
- 0.000000000f, 1.000000000f,
- -0.012271538f, 0.999924702f,
- -0.024541229f, 0.999698819f,
- -0.036807223f, 0.999322385f,
- -0.049067674f, 0.998795456f,
- -0.061320736f, 0.998118113f,
- -0.073564564f, 0.997290457f,
- -0.085797312f, 0.996312612f,
- -0.098017140f, 0.995184727f,
- -0.110222207f, 0.993906970f,
- -0.122410675f, 0.992479535f,
- -0.134580709f, 0.990902635f,
- -0.146730474f, 0.989176510f,
- -0.158858143f, 0.987301418f,
- -0.170961889f, 0.985277642f,
- -0.183039888f, 0.983105487f,
- -0.195090322f, 0.980785280f,
- -0.207111376f, 0.978317371f,
- -0.219101240f, 0.975702130f,
- -0.231058108f, 0.972939952f,
- -0.242980180f, 0.970031253f,
- -0.254865660f, 0.966976471f,
- -0.266712757f, 0.963776066f,
- -0.278519689f, 0.960430519f,
- -0.290284677f, 0.956940336f,
- -0.302005949f, 0.953306040f,
- -0.313681740f, 0.949528181f,
- -0.325310292f, 0.945607325f,
- -0.336889853f, 0.941544065f,
- -0.348418680f, 0.937339012f,
- -0.359895037f, 0.932992799f,
- -0.371317194f, 0.928506080f,
- -0.382683432f, 0.923879533f,
- -0.393992040f, 0.919113852f,
- -0.405241314f, 0.914209756f,
- -0.416429560f, 0.909167983f,
- -0.427555093f, 0.903989293f,
- -0.438616239f, 0.898674466f,
- -0.449611330f, 0.893224301f,
- -0.460538711f, 0.887639620f,
- -0.471396737f, 0.881921264f,
- -0.482183772f, 0.876070094f,
- -0.492898192f, 0.870086991f,
- -0.503538384f, 0.863972856f,
- -0.514102744f, 0.857728610f,
- -0.524589683f, 0.851355193f,
- -0.534997620f, 0.844853565f,
- -0.545324988f, 0.838224706f,
- -0.555570233f, 0.831469612f,
- -0.565731811f, 0.824589303f,
- -0.575808191f, 0.817584813f,
- -0.585797857f, 0.810457198f,
- -0.595699304f, 0.803207531f,
- -0.605511041f, 0.795836905f,
- -0.615231591f, 0.788346428f,
- -0.624859488f, 0.780737229f,
- -0.634393284f, 0.773010453f,
- -0.643831543f, 0.765167266f,
- -0.653172843f, 0.757208847f,
- -0.662415778f, 0.749136395f,
- -0.671558955f, 0.740951125f,
- -0.680600998f, 0.732654272f,
- -0.689540545f, 0.724247083f,
- -0.698376249f, 0.715730825f,
- -0.707106781f, 0.707106781f,
- -0.715730825f, 0.698376249f,
- -0.724247083f, 0.689540545f,
- -0.732654272f, 0.680600998f,
- -0.740951125f, 0.671558955f,
- -0.749136395f, 0.662415778f,
- -0.757208847f, 0.653172843f,
- -0.765167266f, 0.643831543f,
- -0.773010453f, 0.634393284f,
- -0.780737229f, 0.624859488f,
- -0.788346428f, 0.615231591f,
- -0.795836905f, 0.605511041f,
- -0.803207531f, 0.595699304f,
- -0.810457198f, 0.585797857f,
- -0.817584813f, 0.575808191f,
- -0.824589303f, 0.565731811f,
- -0.831469612f, 0.555570233f,
- -0.838224706f, 0.545324988f,
- -0.844853565f, 0.534997620f,
- -0.851355193f, 0.524589683f,
- -0.857728610f, 0.514102744f,
- -0.863972856f, 0.503538384f,
- -0.870086991f, 0.492898192f,
- -0.876070094f, 0.482183772f,
- -0.881921264f, 0.471396737f,
- -0.887639620f, 0.460538711f,
- -0.893224301f, 0.449611330f,
- -0.898674466f, 0.438616239f,
- -0.903989293f, 0.427555093f,
- -0.909167983f, 0.416429560f,
- -0.914209756f, 0.405241314f,
- -0.919113852f, 0.393992040f,
- -0.923879533f, 0.382683432f,
- -0.928506080f, 0.371317194f,
- -0.932992799f, 0.359895037f,
- -0.937339012f, 0.348418680f,
- -0.941544065f, 0.336889853f,
- -0.945607325f, 0.325310292f,
- -0.949528181f, 0.313681740f,
- -0.953306040f, 0.302005949f,
- -0.956940336f, 0.290284677f,
- -0.960430519f, 0.278519689f,
- -0.963776066f, 0.266712757f,
- -0.966976471f, 0.254865660f,
- -0.970031253f, 0.242980180f,
- -0.972939952f, 0.231058108f,
- -0.975702130f, 0.219101240f,
- -0.978317371f, 0.207111376f,
- -0.980785280f, 0.195090322f,
- -0.983105487f, 0.183039888f,
- -0.985277642f, 0.170961889f,
- -0.987301418f, 0.158858143f,
- -0.989176510f, 0.146730474f,
- -0.990902635f, 0.134580709f,
- -0.992479535f, 0.122410675f,
- -0.993906970f, 0.110222207f,
- -0.995184727f, 0.098017140f,
- -0.996312612f, 0.085797312f,
- -0.997290457f, 0.073564564f,
- -0.998118113f, 0.061320736f,
- -0.998795456f, 0.049067674f,
- -0.999322385f, 0.036807223f,
- -0.999698819f, 0.024541229f,
- -0.999924702f, 0.012271538f,
- -1.000000000f, 0.000000000f,
- -0.999924702f, -0.012271538f,
- -0.999698819f, -0.024541229f,
- -0.999322385f, -0.036807223f,
- -0.998795456f, -0.049067674f,
- -0.998118113f, -0.061320736f,
- -0.997290457f, -0.073564564f,
- -0.996312612f, -0.085797312f,
- -0.995184727f, -0.098017140f,
- -0.993906970f, -0.110222207f,
- -0.992479535f, -0.122410675f,
- -0.990902635f, -0.134580709f,
- -0.989176510f, -0.146730474f,
- -0.987301418f, -0.158858143f,
- -0.985277642f, -0.170961889f,
- -0.983105487f, -0.183039888f,
- -0.980785280f, -0.195090322f,
- -0.978317371f, -0.207111376f,
- -0.975702130f, -0.219101240f,
- -0.972939952f, -0.231058108f,
- -0.970031253f, -0.242980180f,
- -0.966976471f, -0.254865660f,
- -0.963776066f, -0.266712757f,
- -0.960430519f, -0.278519689f,
- -0.956940336f, -0.290284677f,
- -0.953306040f, -0.302005949f,
- -0.949528181f, -0.313681740f,
- -0.945607325f, -0.325310292f,
- -0.941544065f, -0.336889853f,
- -0.937339012f, -0.348418680f,
- -0.932992799f, -0.359895037f,
- -0.928506080f, -0.371317194f,
- -0.923879533f, -0.382683432f,
- -0.919113852f, -0.393992040f,
- -0.914209756f, -0.405241314f,
- -0.909167983f, -0.416429560f,
- -0.903989293f, -0.427555093f,
- -0.898674466f, -0.438616239f,
- -0.893224301f, -0.449611330f,
- -0.887639620f, -0.460538711f,
- -0.881921264f, -0.471396737f,
- -0.876070094f, -0.482183772f,
- -0.870086991f, -0.492898192f,
- -0.863972856f, -0.503538384f,
- -0.857728610f, -0.514102744f,
- -0.851355193f, -0.524589683f,
- -0.844853565f, -0.534997620f,
- -0.838224706f, -0.545324988f,
- -0.831469612f, -0.555570233f,
- -0.824589303f, -0.565731811f,
- -0.817584813f, -0.575808191f,
- -0.810457198f, -0.585797857f,
- -0.803207531f, -0.595699304f,
- -0.795836905f, -0.605511041f,
- -0.788346428f, -0.615231591f,
- -0.780737229f, -0.624859488f,
- -0.773010453f, -0.634393284f,
- -0.765167266f, -0.643831543f,
- -0.757208847f, -0.653172843f,
- -0.749136395f, -0.662415778f,
- -0.740951125f, -0.671558955f,
- -0.732654272f, -0.680600998f,
- -0.724247083f, -0.689540545f,
- -0.715730825f, -0.698376249f,
- -0.707106781f, -0.707106781f,
- -0.698376249f, -0.715730825f,
- -0.689540545f, -0.724247083f,
- -0.680600998f, -0.732654272f,
- -0.671558955f, -0.740951125f,
- -0.662415778f, -0.749136395f,
- -0.653172843f, -0.757208847f,
- -0.643831543f, -0.765167266f,
- -0.634393284f, -0.773010453f,
- -0.624859488f, -0.780737229f,
- -0.615231591f, -0.788346428f,
- -0.605511041f, -0.795836905f,
- -0.595699304f, -0.803207531f,
- -0.585797857f, -0.810457198f,
- -0.575808191f, -0.817584813f,
- -0.565731811f, -0.824589303f,
- -0.555570233f, -0.831469612f,
- -0.545324988f, -0.838224706f,
- -0.534997620f, -0.844853565f,
- -0.524589683f, -0.851355193f,
- -0.514102744f, -0.857728610f,
- -0.503538384f, -0.863972856f,
- -0.492898192f, -0.870086991f,
- -0.482183772f, -0.876070094f,
- -0.471396737f, -0.881921264f,
- -0.460538711f, -0.887639620f,
- -0.449611330f, -0.893224301f,
- -0.438616239f, -0.898674466f,
- -0.427555093f, -0.903989293f,
- -0.416429560f, -0.909167983f,
- -0.405241314f, -0.914209756f,
- -0.393992040f, -0.919113852f,
- -0.382683432f, -0.923879533f,
- -0.371317194f, -0.928506080f,
- -0.359895037f, -0.932992799f,
- -0.348418680f, -0.937339012f,
- -0.336889853f, -0.941544065f,
- -0.325310292f, -0.945607325f,
- -0.313681740f, -0.949528181f,
- -0.302005949f, -0.953306040f,
- -0.290284677f, -0.956940336f,
- -0.278519689f, -0.960430519f,
- -0.266712757f, -0.963776066f,
- -0.254865660f, -0.966976471f,
- -0.242980180f, -0.970031253f,
- -0.231058108f, -0.972939952f,
- -0.219101240f, -0.975702130f,
- -0.207111376f, -0.978317371f,
- -0.195090322f, -0.980785280f,
- -0.183039888f, -0.983105487f,
- -0.170961889f, -0.985277642f,
- -0.158858143f, -0.987301418f,
- -0.146730474f, -0.989176510f,
- -0.134580709f, -0.990902635f,
- -0.122410675f, -0.992479535f,
- -0.110222207f, -0.993906970f,
- -0.098017140f, -0.995184727f,
- -0.085797312f, -0.996312612f,
- -0.073564564f, -0.997290457f,
- -0.061320736f, -0.998118113f,
- -0.049067674f, -0.998795456f,
- -0.036807223f, -0.999322385f,
- -0.024541229f, -0.999698819f,
- -0.012271538f, -0.999924702f,
- -0.000000000f, -1.000000000f,
- 0.012271538f, -0.999924702f,
- 0.024541229f, -0.999698819f,
- 0.036807223f, -0.999322385f,
- 0.049067674f, -0.998795456f,
- 0.061320736f, -0.998118113f,
- 0.073564564f, -0.997290457f,
- 0.085797312f, -0.996312612f,
- 0.098017140f, -0.995184727f,
- 0.110222207f, -0.993906970f,
- 0.122410675f, -0.992479535f,
- 0.134580709f, -0.990902635f,
- 0.146730474f, -0.989176510f,
- 0.158858143f, -0.987301418f,
- 0.170961889f, -0.985277642f,
- 0.183039888f, -0.983105487f,
- 0.195090322f, -0.980785280f,
- 0.207111376f, -0.978317371f,
- 0.219101240f, -0.975702130f,
- 0.231058108f, -0.972939952f,
- 0.242980180f, -0.970031253f,
- 0.254865660f, -0.966976471f,
- 0.266712757f, -0.963776066f,
- 0.278519689f, -0.960430519f,
- 0.290284677f, -0.956940336f,
- 0.302005949f, -0.953306040f,
- 0.313681740f, -0.949528181f,
- 0.325310292f, -0.945607325f,
- 0.336889853f, -0.941544065f,
- 0.348418680f, -0.937339012f,
- 0.359895037f, -0.932992799f,
- 0.371317194f, -0.928506080f,
- 0.382683432f, -0.923879533f,
- 0.393992040f, -0.919113852f,
- 0.405241314f, -0.914209756f,
- 0.416429560f, -0.909167983f,
- 0.427555093f, -0.903989293f,
- 0.438616239f, -0.898674466f,
- 0.449611330f, -0.893224301f,
- 0.460538711f, -0.887639620f,
- 0.471396737f, -0.881921264f,
- 0.482183772f, -0.876070094f,
- 0.492898192f, -0.870086991f,
- 0.503538384f, -0.863972856f,
- 0.514102744f, -0.857728610f,
- 0.524589683f, -0.851355193f,
- 0.534997620f, -0.844853565f,
- 0.545324988f, -0.838224706f,
- 0.555570233f, -0.831469612f,
- 0.565731811f, -0.824589303f,
- 0.575808191f, -0.817584813f,
- 0.585797857f, -0.810457198f,
- 0.595699304f, -0.803207531f,
- 0.605511041f, -0.795836905f,
- 0.615231591f, -0.788346428f,
- 0.624859488f, -0.780737229f,
- 0.634393284f, -0.773010453f,
- 0.643831543f, -0.765167266f,
- 0.653172843f, -0.757208847f,
- 0.662415778f, -0.749136395f,
- 0.671558955f, -0.740951125f,
- 0.680600998f, -0.732654272f,
- 0.689540545f, -0.724247083f,
- 0.698376249f, -0.715730825f,
- 0.707106781f, -0.707106781f,
- 0.715730825f, -0.698376249f,
- 0.724247083f, -0.689540545f,
- 0.732654272f, -0.680600998f,
- 0.740951125f, -0.671558955f,
- 0.749136395f, -0.662415778f,
- 0.757208847f, -0.653172843f,
- 0.765167266f, -0.643831543f,
- 0.773010453f, -0.634393284f,
- 0.780737229f, -0.624859488f,
- 0.788346428f, -0.615231591f,
- 0.795836905f, -0.605511041f,
- 0.803207531f, -0.595699304f,
- 0.810457198f, -0.585797857f,
- 0.817584813f, -0.575808191f,
- 0.824589303f, -0.565731811f,
- 0.831469612f, -0.555570233f,
- 0.838224706f, -0.545324988f,
- 0.844853565f, -0.534997620f,
- 0.851355193f, -0.524589683f,
- 0.857728610f, -0.514102744f,
- 0.863972856f, -0.503538384f,
- 0.870086991f, -0.492898192f,
- 0.876070094f, -0.482183772f,
- 0.881921264f, -0.471396737f,
- 0.887639620f, -0.460538711f,
- 0.893224301f, -0.449611330f,
- 0.898674466f, -0.438616239f,
- 0.903989293f, -0.427555093f,
- 0.909167983f, -0.416429560f,
- 0.914209756f, -0.405241314f,
- 0.919113852f, -0.393992040f,
- 0.923879533f, -0.382683432f,
- 0.928506080f, -0.371317194f,
- 0.932992799f, -0.359895037f,
- 0.937339012f, -0.348418680f,
- 0.941544065f, -0.336889853f,
- 0.945607325f, -0.325310292f,
- 0.949528181f, -0.313681740f,
- 0.953306040f, -0.302005949f,
- 0.956940336f, -0.290284677f,
- 0.960430519f, -0.278519689f,
- 0.963776066f, -0.266712757f,
- 0.966976471f, -0.254865660f,
- 0.970031253f, -0.242980180f,
- 0.972939952f, -0.231058108f,
- 0.975702130f, -0.219101240f,
- 0.978317371f, -0.207111376f,
- 0.980785280f, -0.195090322f,
- 0.983105487f, -0.183039888f,
- 0.985277642f, -0.170961889f,
- 0.987301418f, -0.158858143f,
- 0.989176510f, -0.146730474f,
- 0.990902635f, -0.134580709f,
- 0.992479535f, -0.122410675f,
- 0.993906970f, -0.110222207f,
- 0.995184727f, -0.098017140f,
- 0.996312612f, -0.085797312f,
- 0.997290457f, -0.073564564f,
- 0.998118113f, -0.061320736f,
- 0.998795456f, -0.049067674f,
- 0.999322385f, -0.036807223f,
- 0.999698819f, -0.024541229f,
- 0.999924702f, -0.012271538f
-};
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 1024 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_1024[2048] = {
-1.000000000f , 0.000000000f ,
-0.999981175f , 0.006135885f ,
-0.999924702f , 0.012271538f ,
-0.999830582f , 0.018406730f ,
-0.999698819f , 0.024541229f ,
-0.999529418f , 0.030674803f ,
-0.999322385f , 0.036807223f ,
-0.999077728f , 0.042938257f ,
-0.998795456f , 0.049067674f ,
-0.998475581f , 0.055195244f ,
-0.998118113f , 0.061320736f ,
-0.997723067f , 0.067443920f ,
-0.997290457f , 0.073564564f ,
-0.996820299f , 0.079682438f ,
-0.996312612f , 0.085797312f ,
-0.995767414f , 0.091908956f ,
-0.995184727f , 0.098017140f ,
-0.994564571f , 0.104121634f ,
-0.993906970f , 0.110222207f ,
-0.993211949f , 0.116318631f ,
-0.992479535f , 0.122410675f ,
-0.991709754f , 0.128498111f ,
-0.990902635f , 0.134580709f ,
-0.990058210f , 0.140658239f ,
-0.989176510f , 0.146730474f ,
-0.988257568f , 0.152797185f ,
-0.987301418f , 0.158858143f ,
-0.986308097f , 0.164913120f ,
-0.985277642f , 0.170961889f ,
-0.984210092f , 0.177004220f ,
-0.983105487f , 0.183039888f ,
-0.981963869f , 0.189068664f ,
-0.980785280f , 0.195090322f ,
-0.979569766f , 0.201104635f ,
-0.978317371f , 0.207111376f ,
-0.977028143f , 0.213110320f ,
-0.975702130f , 0.219101240f ,
-0.974339383f , 0.225083911f ,
-0.972939952f , 0.231058108f ,
-0.971503891f , 0.237023606f ,
-0.970031253f , 0.242980180f ,
-0.968522094f , 0.248927606f ,
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-0.676092704f , -0.736816569f ,
-0.680600998f , -0.732654272f ,
-0.685083668f , -0.728464390f ,
-0.689540545f , -0.724247083f ,
-0.693971461f , -0.720002508f ,
-0.698376249f , -0.715730825f ,
-0.702754744f , -0.711432196f ,
-0.707106781f , -0.707106781f ,
-0.711432196f , -0.702754744f ,
-0.715730825f , -0.698376249f ,
-0.720002508f , -0.693971461f ,
-0.724247083f , -0.689540545f ,
-0.728464390f , -0.685083668f ,
-0.732654272f , -0.680600998f ,
-0.736816569f , -0.676092704f ,
-0.740951125f , -0.671558955f ,
-0.745057785f , -0.666999922f ,
-0.749136395f , -0.662415778f ,
-0.753186799f , -0.657806693f ,
-0.757208847f , -0.653172843f ,
-0.761202385f , -0.648514401f ,
-0.765167266f , -0.643831543f ,
-0.769103338f , -0.639124445f ,
-0.773010453f , -0.634393284f ,
-0.776888466f , -0.629638239f ,
-0.780737229f , -0.624859488f ,
-0.784556597f , -0.620057212f ,
-0.788346428f , -0.615231591f ,
-0.792106577f , -0.610382806f ,
-0.795836905f , -0.605511041f ,
-0.799537269f , -0.600616479f ,
-0.803207531f , -0.595699304f ,
-0.806847554f , -0.590759702f ,
-0.810457198f , -0.585797857f ,
-0.814036330f , -0.580813958f ,
-0.817584813f , -0.575808191f ,
-0.821102515f , -0.570780746f ,
-0.824589303f , -0.565731811f ,
-0.828045045f , -0.560661576f ,
-0.831469612f , -0.555570233f ,
-0.834862875f , -0.550457973f ,
-0.838224706f , -0.545324988f ,
-0.841554977f , -0.540171473f ,
-0.844853565f , -0.534997620f ,
-0.848120345f , -0.529803625f ,
-0.851355193f , -0.524589683f ,
-0.854557988f , -0.519355990f ,
-0.857728610f , -0.514102744f ,
-0.860866939f , -0.508830143f ,
-0.863972856f , -0.503538384f ,
-0.867046246f , -0.498227667f ,
-0.870086991f , -0.492898192f ,
-0.873094978f , -0.487550160f ,
-0.876070094f , -0.482183772f ,
-0.879012226f , -0.476799230f ,
-0.881921264f , -0.471396737f ,
-0.884797098f , -0.465976496f ,
-0.887639620f , -0.460538711f ,
-0.890448723f , -0.455083587f ,
-0.893224301f , -0.449611330f ,
-0.895966250f , -0.444122145f ,
-0.898674466f , -0.438616239f ,
-0.901348847f , -0.433093819f ,
-0.903989293f , -0.427555093f ,
-0.906595705f , -0.422000271f ,
-0.909167983f , -0.416429560f ,
-0.911706032f , -0.410843171f ,
-0.914209756f , -0.405241314f ,
-0.916679060f , -0.399624200f ,
-0.919113852f , -0.393992040f ,
-0.921514039f , -0.388345047f ,
-0.923879533f , -0.382683432f ,
-0.926210242f , -0.377007410f ,
-0.928506080f , -0.371317194f ,
-0.930766961f , -0.365612998f ,
-0.932992799f , -0.359895037f ,
-0.935183510f , -0.354163525f ,
-0.937339012f , -0.348418680f ,
-0.939459224f , -0.342660717f ,
-0.941544065f , -0.336889853f ,
-0.943593458f , -0.331106306f ,
-0.945607325f , -0.325310292f ,
-0.947585591f , -0.319502031f ,
-0.949528181f , -0.313681740f ,
-0.951435021f , -0.307849640f ,
-0.953306040f , -0.302005949f ,
-0.955141168f , -0.296150888f ,
-0.956940336f , -0.290284677f ,
-0.958703475f , -0.284407537f ,
-0.960430519f , -0.278519689f ,
-0.962121404f , -0.272621355f ,
-0.963776066f , -0.266712757f ,
-0.965394442f , -0.260794118f ,
-0.966976471f , -0.254865660f ,
-0.968522094f , -0.248927606f ,
-0.970031253f , -0.242980180f ,
-0.971503891f , -0.237023606f ,
-0.972939952f , -0.231058108f ,
-0.974339383f , -0.225083911f ,
-0.975702130f , -0.219101240f ,
-0.977028143f , -0.213110320f ,
-0.978317371f , -0.207111376f ,
-0.979569766f , -0.201104635f ,
-0.980785280f , -0.195090322f ,
-0.981963869f , -0.189068664f ,
-0.983105487f , -0.183039888f ,
-0.984210092f , -0.177004220f ,
-0.985277642f , -0.170961889f ,
-0.986308097f , -0.164913120f ,
-0.987301418f , -0.158858143f ,
-0.988257568f , -0.152797185f ,
-0.989176510f , -0.146730474f ,
-0.990058210f , -0.140658239f ,
-0.990902635f , -0.134580709f ,
-0.991709754f , -0.128498111f ,
-0.992479535f , -0.122410675f ,
-0.993211949f , -0.116318631f ,
-0.993906970f , -0.110222207f ,
-0.994564571f , -0.104121634f ,
-0.995184727f , -0.098017140f ,
-0.995767414f , -0.091908956f ,
-0.996312612f , -0.085797312f ,
-0.996820299f , -0.079682438f ,
-0.997290457f , -0.073564564f ,
-0.997723067f , -0.067443920f ,
-0.998118113f , -0.061320736f ,
-0.998475581f , -0.055195244f ,
-0.998795456f , -0.049067674f ,
-0.999077728f , -0.042938257f ,
-0.999322385f , -0.036807223f ,
-0.999529418f , -0.030674803f ,
-0.999698819f , -0.024541229f ,
-0.999830582f , -0.018406730f ,
-0.999924702f , -0.012271538f ,
-0.999981175f , -0.006135885f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 2048 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_2048[4096] = {
- 1.000000000f, 0.000000000f,
- 0.999995294f, 0.003067957f,
- 0.999981175f, 0.006135885f,
- 0.999957645f, 0.009203755f,
- 0.999924702f, 0.012271538f,
- 0.999882347f, 0.015339206f,
- 0.999830582f, 0.018406730f,
- 0.999769405f, 0.021474080f,
- 0.999698819f, 0.024541229f,
- 0.999618822f, 0.027608146f,
- 0.999529418f, 0.030674803f,
- 0.999430605f, 0.033741172f,
- 0.999322385f, 0.036807223f,
- 0.999204759f, 0.039872928f,
- 0.999077728f, 0.042938257f,
- 0.998941293f, 0.046003182f,
- 0.998795456f, 0.049067674f,
- 0.998640218f, 0.052131705f,
- 0.998475581f, 0.055195244f,
- 0.998301545f, 0.058258265f,
- 0.998118113f, 0.061320736f,
- 0.997925286f, 0.064382631f,
- 0.997723067f, 0.067443920f,
- 0.997511456f, 0.070504573f,
- 0.997290457f, 0.073564564f,
- 0.997060070f, 0.076623861f,
- 0.996820299f, 0.079682438f,
- 0.996571146f, 0.082740265f,
- 0.996312612f, 0.085797312f,
- 0.996044701f, 0.088853553f,
- 0.995767414f, 0.091908956f,
- 0.995480755f, 0.094963495f,
- 0.995184727f, 0.098017140f,
- 0.994879331f, 0.101069863f,
- 0.994564571f, 0.104121634f,
- 0.994240449f, 0.107172425f,
- 0.993906970f, 0.110222207f,
- 0.993564136f, 0.113270952f,
- 0.993211949f, 0.116318631f,
- 0.992850414f, 0.119365215f,
- 0.992479535f, 0.122410675f,
- 0.992099313f, 0.125454983f,
- 0.991709754f, 0.128498111f,
- 0.991310860f, 0.131540029f,
- 0.990902635f, 0.134580709f,
- 0.990485084f, 0.137620122f,
- 0.990058210f, 0.140658239f,
- 0.989622017f, 0.143695033f,
- 0.989176510f, 0.146730474f,
- 0.988721692f, 0.149764535f,
- 0.988257568f, 0.152797185f,
- 0.987784142f, 0.155828398f,
- 0.987301418f, 0.158858143f,
- 0.986809402f, 0.161886394f,
- 0.986308097f, 0.164913120f,
- 0.985797509f, 0.167938295f,
- 0.985277642f, 0.170961889f,
- 0.984748502f, 0.173983873f,
- 0.984210092f, 0.177004220f,
- 0.983662419f, 0.180022901f,
- 0.983105487f, 0.183039888f,
- 0.982539302f, 0.186055152f,
- 0.981963869f, 0.189068664f,
- 0.981379193f, 0.192080397f,
- 0.980785280f, 0.195090322f,
- 0.980182136f, 0.198098411f,
- 0.979569766f, 0.201104635f,
- 0.978948175f, 0.204108966f,
- 0.978317371f, 0.207111376f,
- 0.977677358f, 0.210111837f,
- 0.977028143f, 0.213110320f,
- 0.976369731f, 0.216106797f,
- 0.975702130f, 0.219101240f,
- 0.975025345f, 0.222093621f,
- 0.974339383f, 0.225083911f,
- 0.973644250f, 0.228072083f,
- 0.972939952f, 0.231058108f,
- 0.972226497f, 0.234041959f,
- 0.971503891f, 0.237023606f,
- 0.970772141f, 0.240003022f,
- 0.970031253f, 0.242980180f,
- 0.969281235f, 0.245955050f,
- 0.968522094f, 0.248927606f,
- 0.967753837f, 0.251897818f,
- 0.966976471f, 0.254865660f,
- 0.966190003f, 0.257831102f,
- 0.965394442f, 0.260794118f,
- 0.964589793f, 0.263754679f,
- 0.963776066f, 0.266712757f,
- 0.962953267f, 0.269668326f,
- 0.962121404f, 0.272621355f,
- 0.961280486f, 0.275571819f,
- 0.960430519f, 0.278519689f,
- 0.959571513f, 0.281464938f,
- 0.958703475f, 0.284407537f,
- 0.957826413f, 0.287347460f,
- 0.956940336f, 0.290284677f,
- 0.956045251f, 0.293219163f,
- 0.955141168f, 0.296150888f,
- 0.954228095f, 0.299079826f,
- 0.953306040f, 0.302005949f,
- 0.952375013f, 0.304929230f,
- 0.951435021f, 0.307849640f,
- 0.950486074f, 0.310767153f,
- 0.949528181f, 0.313681740f,
- 0.948561350f, 0.316593376f,
- 0.947585591f, 0.319502031f,
- 0.946600913f, 0.322407679f,
- 0.945607325f, 0.325310292f,
- 0.944604837f, 0.328209844f,
- 0.943593458f, 0.331106306f,
- 0.942573198f, 0.333999651f,
- 0.941544065f, 0.336889853f,
- 0.940506071f, 0.339776884f,
- 0.939459224f, 0.342660717f,
- 0.938403534f, 0.345541325f,
- 0.937339012f, 0.348418680f,
- 0.936265667f, 0.351292756f,
- 0.935183510f, 0.354163525f,
- 0.934092550f, 0.357030961f,
- 0.932992799f, 0.359895037f,
- 0.931884266f, 0.362755724f,
- 0.930766961f, 0.365612998f,
- 0.929640896f, 0.368466830f,
- 0.928506080f, 0.371317194f,
- 0.927362526f, 0.374164063f,
- 0.926210242f, 0.377007410f,
- 0.925049241f, 0.379847209f,
- 0.923879533f, 0.382683432f,
- 0.922701128f, 0.385516054f,
- 0.921514039f, 0.388345047f,
- 0.920318277f, 0.391170384f,
- 0.919113852f, 0.393992040f,
- 0.917900776f, 0.396809987f,
- 0.916679060f, 0.399624200f,
- 0.915448716f, 0.402434651f,
- 0.914209756f, 0.405241314f,
- 0.912962190f, 0.408044163f,
- 0.911706032f, 0.410843171f,
- 0.910441292f, 0.413638312f,
- 0.909167983f, 0.416429560f,
- 0.907886116f, 0.419216888f,
- 0.906595705f, 0.422000271f,
- 0.905296759f, 0.424779681f,
- 0.903989293f, 0.427555093f,
- 0.902673318f, 0.430326481f,
- 0.901348847f, 0.433093819f,
- 0.900015892f, 0.435857080f,
- 0.898674466f, 0.438616239f,
- 0.897324581f, 0.441371269f,
- 0.895966250f, 0.444122145f,
- 0.894599486f, 0.446868840f,
- 0.893224301f, 0.449611330f,
- 0.891840709f, 0.452349587f,
- 0.890448723f, 0.455083587f,
- 0.889048356f, 0.457813304f,
- 0.887639620f, 0.460538711f,
- 0.886222530f, 0.463259784f,
- 0.884797098f, 0.465976496f,
- 0.883363339f, 0.468688822f,
- 0.881921264f, 0.471396737f,
- 0.880470889f, 0.474100215f,
- 0.879012226f, 0.476799230f,
- 0.877545290f, 0.479493758f,
- 0.876070094f, 0.482183772f,
- 0.874586652f, 0.484869248f,
- 0.873094978f, 0.487550160f,
- 0.871595087f, 0.490226483f,
- 0.870086991f, 0.492898192f,
- 0.868570706f, 0.495565262f,
- 0.867046246f, 0.498227667f,
- 0.865513624f, 0.500885383f,
- 0.863972856f, 0.503538384f,
- 0.862423956f, 0.506186645f,
- 0.860866939f, 0.508830143f,
- 0.859301818f, 0.511468850f,
- 0.857728610f, 0.514102744f,
- 0.856147328f, 0.516731799f,
- 0.854557988f, 0.519355990f,
- 0.852960605f, 0.521975293f,
- 0.851355193f, 0.524589683f,
- 0.849741768f, 0.527199135f,
- 0.848120345f, 0.529803625f,
- 0.846490939f, 0.532403128f,
- 0.844853565f, 0.534997620f,
- 0.843208240f, 0.537587076f,
- 0.841554977f, 0.540171473f,
- 0.839893794f, 0.542750785f,
- 0.838224706f, 0.545324988f,
- 0.836547727f, 0.547894059f,
- 0.834862875f, 0.550457973f,
- 0.833170165f, 0.553016706f,
- 0.831469612f, 0.555570233f,
- 0.829761234f, 0.558118531f,
- 0.828045045f, 0.560661576f,
- 0.826321063f, 0.563199344f,
- 0.824589303f, 0.565731811f,
- 0.822849781f, 0.568258953f,
- 0.821102515f, 0.570780746f,
- 0.819347520f, 0.573297167f,
- 0.817584813f, 0.575808191f,
- 0.815814411f, 0.578313796f,
- 0.814036330f, 0.580813958f,
- 0.812250587f, 0.583308653f,
- 0.810457198f, 0.585797857f,
- 0.808656182f, 0.588281548f,
- 0.806847554f, 0.590759702f,
- 0.805031331f, 0.593232295f,
- 0.803207531f, 0.595699304f,
- 0.801376172f, 0.598160707f,
- 0.799537269f, 0.600616479f,
- 0.797690841f, 0.603066599f,
- 0.795836905f, 0.605511041f,
- 0.793975478f, 0.607949785f,
- 0.792106577f, 0.610382806f,
- 0.790230221f, 0.612810082f,
- 0.788346428f, 0.615231591f,
- 0.786455214f, 0.617647308f,
- 0.784556597f, 0.620057212f,
- 0.782650596f, 0.622461279f,
- 0.780737229f, 0.624859488f,
- 0.778816512f, 0.627251815f,
- 0.776888466f, 0.629638239f,
- 0.774953107f, 0.632018736f,
- 0.773010453f, 0.634393284f,
- 0.771060524f, 0.636761861f,
- 0.769103338f, 0.639124445f,
- 0.767138912f, 0.641481013f,
- 0.765167266f, 0.643831543f,
- 0.763188417f, 0.646176013f,
- 0.761202385f, 0.648514401f,
- 0.759209189f, 0.650846685f,
- 0.757208847f, 0.653172843f,
- 0.755201377f, 0.655492853f,
- 0.753186799f, 0.657806693f,
- 0.751165132f, 0.660114342f,
- 0.749136395f, 0.662415778f,
- 0.747100606f, 0.664710978f,
- 0.745057785f, 0.666999922f,
- 0.743007952f, 0.669282588f,
- 0.740951125f, 0.671558955f,
- 0.738887324f, 0.673829000f,
- 0.736816569f, 0.676092704f,
- 0.734738878f, 0.678350043f,
- 0.732654272f, 0.680600998f,
- 0.730562769f, 0.682845546f,
- 0.728464390f, 0.685083668f,
- 0.726359155f, 0.687315341f,
- 0.724247083f, 0.689540545f,
- 0.722128194f, 0.691759258f,
- 0.720002508f, 0.693971461f,
- 0.717870045f, 0.696177131f,
- 0.715730825f, 0.698376249f,
- 0.713584869f, 0.700568794f,
- 0.711432196f, 0.702754744f,
- 0.709272826f, 0.704934080f,
- 0.707106781f, 0.707106781f,
- 0.704934080f, 0.709272826f,
- 0.702754744f, 0.711432196f,
- 0.700568794f, 0.713584869f,
- 0.698376249f, 0.715730825f,
- 0.696177131f, 0.717870045f,
- 0.693971461f, 0.720002508f,
- 0.691759258f, 0.722128194f,
- 0.689540545f, 0.724247083f,
- 0.687315341f, 0.726359155f,
- 0.685083668f, 0.728464390f,
- 0.682845546f, 0.730562769f,
- 0.680600998f, 0.732654272f,
- 0.678350043f, 0.734738878f,
- 0.676092704f, 0.736816569f,
- 0.673829000f, 0.738887324f,
- 0.671558955f, 0.740951125f,
- 0.669282588f, 0.743007952f,
- 0.666999922f, 0.745057785f,
- 0.664710978f, 0.747100606f,
- 0.662415778f, 0.749136395f,
- 0.660114342f, 0.751165132f,
- 0.657806693f, 0.753186799f,
- 0.655492853f, 0.755201377f,
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- 0.917900776f, -0.396809987f,
- 0.919113852f, -0.393992040f,
- 0.920318277f, -0.391170384f,
- 0.921514039f, -0.388345047f,
- 0.922701128f, -0.385516054f,
- 0.923879533f, -0.382683432f,
- 0.925049241f, -0.379847209f,
- 0.926210242f, -0.377007410f,
- 0.927362526f, -0.374164063f,
- 0.928506080f, -0.371317194f,
- 0.929640896f, -0.368466830f,
- 0.930766961f, -0.365612998f,
- 0.931884266f, -0.362755724f,
- 0.932992799f, -0.359895037f,
- 0.934092550f, -0.357030961f,
- 0.935183510f, -0.354163525f,
- 0.936265667f, -0.351292756f,
- 0.937339012f, -0.348418680f,
- 0.938403534f, -0.345541325f,
- 0.939459224f, -0.342660717f,
- 0.940506071f, -0.339776884f,
- 0.941544065f, -0.336889853f,
- 0.942573198f, -0.333999651f,
- 0.943593458f, -0.331106306f,
- 0.944604837f, -0.328209844f,
- 0.945607325f, -0.325310292f,
- 0.946600913f, -0.322407679f,
- 0.947585591f, -0.319502031f,
- 0.948561350f, -0.316593376f,
- 0.949528181f, -0.313681740f,
- 0.950486074f, -0.310767153f,
- 0.951435021f, -0.307849640f,
- 0.952375013f, -0.304929230f,
- 0.953306040f, -0.302005949f,
- 0.954228095f, -0.299079826f,
- 0.955141168f, -0.296150888f,
- 0.956045251f, -0.293219163f,
- 0.956940336f, -0.290284677f,
- 0.957826413f, -0.287347460f,
- 0.958703475f, -0.284407537f,
- 0.959571513f, -0.281464938f,
- 0.960430519f, -0.278519689f,
- 0.961280486f, -0.275571819f,
- 0.962121404f, -0.272621355f,
- 0.962953267f, -0.269668326f,
- 0.963776066f, -0.266712757f,
- 0.964589793f, -0.263754679f,
- 0.965394442f, -0.260794118f,
- 0.966190003f, -0.257831102f,
- 0.966976471f, -0.254865660f,
- 0.967753837f, -0.251897818f,
- 0.968522094f, -0.248927606f,
- 0.969281235f, -0.245955050f,
- 0.970031253f, -0.242980180f,
- 0.970772141f, -0.240003022f,
- 0.971503891f, -0.237023606f,
- 0.972226497f, -0.234041959f,
- 0.972939952f, -0.231058108f,
- 0.973644250f, -0.228072083f,
- 0.974339383f, -0.225083911f,
- 0.975025345f, -0.222093621f,
- 0.975702130f, -0.219101240f,
- 0.976369731f, -0.216106797f,
- 0.977028143f, -0.213110320f,
- 0.977677358f, -0.210111837f,
- 0.978317371f, -0.207111376f,
- 0.978948175f, -0.204108966f,
- 0.979569766f, -0.201104635f,
- 0.980182136f, -0.198098411f,
- 0.980785280f, -0.195090322f,
- 0.981379193f, -0.192080397f,
- 0.981963869f, -0.189068664f,
- 0.982539302f, -0.186055152f,
- 0.983105487f, -0.183039888f,
- 0.983662419f, -0.180022901f,
- 0.984210092f, -0.177004220f,
- 0.984748502f, -0.173983873f,
- 0.985277642f, -0.170961889f,
- 0.985797509f, -0.167938295f,
- 0.986308097f, -0.164913120f,
- 0.986809402f, -0.161886394f,
- 0.987301418f, -0.158858143f,
- 0.987784142f, -0.155828398f,
- 0.988257568f, -0.152797185f,
- 0.988721692f, -0.149764535f,
- 0.989176510f, -0.146730474f,
- 0.989622017f, -0.143695033f,
- 0.990058210f, -0.140658239f,
- 0.990485084f, -0.137620122f,
- 0.990902635f, -0.134580709f,
- 0.991310860f, -0.131540029f,
- 0.991709754f, -0.128498111f,
- 0.992099313f, -0.125454983f,
- 0.992479535f, -0.122410675f,
- 0.992850414f, -0.119365215f,
- 0.993211949f, -0.116318631f,
- 0.993564136f, -0.113270952f,
- 0.993906970f, -0.110222207f,
- 0.994240449f, -0.107172425f,
- 0.994564571f, -0.104121634f,
- 0.994879331f, -0.101069863f,
- 0.995184727f, -0.098017140f,
- 0.995480755f, -0.094963495f,
- 0.995767414f, -0.091908956f,
- 0.996044701f, -0.088853553f,
- 0.996312612f, -0.085797312f,
- 0.996571146f, -0.082740265f,
- 0.996820299f, -0.079682438f,
- 0.997060070f, -0.076623861f,
- 0.997290457f, -0.073564564f,
- 0.997511456f, -0.070504573f,
- 0.997723067f, -0.067443920f,
- 0.997925286f, -0.064382631f,
- 0.998118113f, -0.061320736f,
- 0.998301545f, -0.058258265f,
- 0.998475581f, -0.055195244f,
- 0.998640218f, -0.052131705f,
- 0.998795456f, -0.049067674f,
- 0.998941293f, -0.046003182f,
- 0.999077728f, -0.042938257f,
- 0.999204759f, -0.039872928f,
- 0.999322385f, -0.036807223f,
- 0.999430605f, -0.033741172f,
- 0.999529418f, -0.030674803f,
- 0.999618822f, -0.027608146f,
- 0.999698819f, -0.024541229f,
- 0.999769405f, -0.021474080f,
- 0.999830582f, -0.018406730f,
- 0.999882347f, -0.015339206f,
- 0.999924702f, -0.012271538f,
- 0.999957645f, -0.009203755f,
- 0.999981175f, -0.006135885f,
- 0.999995294f, -0.003067957f
-};
-
-/**
-* \par
-* Example code for Floating-point Twiddle factors Generation:
-* \par
-* <pre>for(i = 0; i< N/; i++)
-* {
-* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
-* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
-* } </pre>
-* \par
-* where N = 4096 and PI = 3.14159265358979
-* \par
-* Cos and Sin values are in interleaved fashion
-*
-*/
-const float32_t twiddleCoef_4096[8192] = {
- 1.000000000f, 0.000000000f,
- 0.999998823f, 0.001533980f,
- 0.999995294f, 0.003067957f,
- 0.999989411f, 0.004601926f,
- 0.999981175f, 0.006135885f,
- 0.999970586f, 0.007669829f,
- 0.999957645f, 0.009203755f,
- 0.999942350f, 0.010737659f,
- 0.999924702f, 0.012271538f,
- 0.999904701f, 0.013805389f,
- 0.999882347f, 0.015339206f,
- 0.999857641f, 0.016872988f,
- 0.999830582f, 0.018406730f,
- 0.999801170f, 0.019940429f,
- 0.999769405f, 0.021474080f,
- 0.999735288f, 0.023007681f,
- 0.999698819f, 0.024541229f,
- 0.999659997f, 0.026074718f,
- 0.999618822f, 0.027608146f,
- 0.999575296f, 0.029141509f,
- 0.999529418f, 0.030674803f,
- 0.999481187f, 0.032208025f,
- 0.999430605f, 0.033741172f,
- 0.999377670f, 0.035274239f,
- 0.999322385f, 0.036807223f,
- 0.999264747f, 0.038340120f,
- 0.999204759f, 0.039872928f,
- 0.999142419f, 0.041405641f,
- 0.999077728f, 0.042938257f,
- 0.999010686f, 0.044470772f,
- 0.998941293f, 0.046003182f,
- 0.998869550f, 0.047535484f,
- 0.998795456f, 0.049067674f,
- 0.998719012f, 0.050599749f,
- 0.998640218f, 0.052131705f,
- 0.998559074f, 0.053663538f,
- 0.998475581f, 0.055195244f,
- 0.998389737f, 0.056726821f,
- 0.998301545f, 0.058258265f,
- 0.998211003f, 0.059789571f,
- 0.998118113f, 0.061320736f,
- 0.998022874f, 0.062851758f,
- 0.997925286f, 0.064382631f,
- 0.997825350f, 0.065913353f,
- 0.997723067f, 0.067443920f,
- 0.997618435f, 0.068974328f,
- 0.997511456f, 0.070504573f,
- 0.997402130f, 0.072034653f,
- 0.997290457f, 0.073564564f,
- 0.997176437f, 0.075094301f,
- 0.997060070f, 0.076623861f,
- 0.996941358f, 0.078153242f,
- 0.996820299f, 0.079682438f,
- 0.996696895f, 0.081211447f,
- 0.996571146f, 0.082740265f,
- 0.996443051f, 0.084268888f,
- 0.996312612f, 0.085797312f,
- 0.996179829f, 0.087325535f,
- 0.996044701f, 0.088853553f,
- 0.995907229f, 0.090381361f,
- 0.995767414f, 0.091908956f,
- 0.995625256f, 0.093436336f,
- 0.995480755f, 0.094963495f,
- 0.995333912f, 0.096490431f,
- 0.995184727f, 0.098017140f,
- 0.995033199f, 0.099543619f,
- 0.994879331f, 0.101069863f,
- 0.994723121f, 0.102595869f,
- 0.994564571f, 0.104121634f,
- 0.994403680f, 0.105647154f,
- 0.994240449f, 0.107172425f,
- 0.994074879f, 0.108697444f,
- 0.993906970f, 0.110222207f,
- 0.993736722f, 0.111746711f,
- 0.993564136f, 0.113270952f,
- 0.993389211f, 0.114794927f,
- 0.993211949f, 0.116318631f,
- 0.993032350f, 0.117842062f,
- 0.992850414f, 0.119365215f,
- 0.992666142f, 0.120888087f,
- 0.992479535f, 0.122410675f,
- 0.992290591f, 0.123932975f,
- 0.992099313f, 0.125454983f,
- 0.991905700f, 0.126976696f,
- 0.991709754f, 0.128498111f,
- 0.991511473f, 0.130019223f,
- 0.991310860f, 0.131540029f,
- 0.991107914f, 0.133060525f,
- 0.990902635f, 0.134580709f,
- 0.990695025f, 0.136100575f,
- 0.990485084f, 0.137620122f,
- 0.990272812f, 0.139139344f,
- 0.990058210f, 0.140658239f,
- 0.989841278f, 0.142176804f,
- 0.989622017f, 0.143695033f,
- 0.989400428f, 0.145212925f,
- 0.989176510f, 0.146730474f,
- 0.988950265f, 0.148247679f,
- 0.988721692f, 0.149764535f,
- 0.988490793f, 0.151281038f,
- 0.988257568f, 0.152797185f,
- 0.988022017f, 0.154312973f,
- 0.987784142f, 0.155828398f,
- 0.987543942f, 0.157343456f,
- 0.987301418f, 0.158858143f,
- 0.987056571f, 0.160372457f,
- 0.986809402f, 0.161886394f,
- 0.986559910f, 0.163399949f,
- 0.986308097f, 0.164913120f,
- 0.986053963f, 0.166425904f,
- 0.985797509f, 0.167938295f,
- 0.985538735f, 0.169450291f,
- 0.985277642f, 0.170961889f,
- 0.985014231f, 0.172473084f,
- 0.984748502f, 0.173983873f,
- 0.984480455f, 0.175494253f,
- 0.984210092f, 0.177004220f,
- 0.983937413f, 0.178513771f,
- 0.983662419f, 0.180022901f,
- 0.983385110f, 0.181531608f,
- 0.983105487f, 0.183039888f,
- 0.982823551f, 0.184547737f,
- 0.982539302f, 0.186055152f,
- 0.982252741f, 0.187562129f,
- 0.981963869f, 0.189068664f,
- 0.981672686f, 0.190574755f,
- 0.981379193f, 0.192080397f,
- 0.981083391f, 0.193585587f,
- 0.980785280f, 0.195090322f,
- 0.980484862f, 0.196594598f,
- 0.980182136f, 0.198098411f,
- 0.979877104f, 0.199601758f,
- 0.979569766f, 0.201104635f,
- 0.979260123f, 0.202607039f,
- 0.978948175f, 0.204108966f,
- 0.978633924f, 0.205610413f,
- 0.978317371f, 0.207111376f,
- 0.977998515f, 0.208611852f,
- 0.977677358f, 0.210111837f,
- 0.977353900f, 0.211611327f,
- 0.977028143f, 0.213110320f,
- 0.976700086f, 0.214608811f,
- 0.976369731f, 0.216106797f,
- 0.976037079f, 0.217604275f,
- 0.975702130f, 0.219101240f,
- 0.975364885f, 0.220597690f,
- 0.975025345f, 0.222093621f,
- 0.974683511f, 0.223589029f,
- 0.974339383f, 0.225083911f,
- 0.973992962f, 0.226578264f,
- 0.973644250f, 0.228072083f,
- 0.973293246f, 0.229565366f,
- 0.972939952f, 0.231058108f,
- 0.972584369f, 0.232550307f,
- 0.972226497f, 0.234041959f,
- 0.971866337f, 0.235533059f,
- 0.971503891f, 0.237023606f,
- 0.971139158f, 0.238513595f,
- 0.970772141f, 0.240003022f,
- 0.970402839f, 0.241491885f,
- 0.970031253f, 0.242980180f,
- 0.969657385f, 0.244467903f,
- 0.969281235f, 0.245955050f,
- 0.968902805f, 0.247441619f,
- 0.968522094f, 0.248927606f,
- 0.968139105f, 0.250413007f,
- 0.967753837f, 0.251897818f,
- 0.967366292f, 0.253382037f,
- 0.966976471f, 0.254865660f,
- 0.966584374f, 0.256348682f,
- 0.966190003f, 0.257831102f,
- 0.965793359f, 0.259312915f,
- 0.965394442f, 0.260794118f,
- 0.964993253f, 0.262274707f,
- 0.964589793f, 0.263754679f,
- 0.964184064f, 0.265234030f,
- 0.963776066f, 0.266712757f,
- 0.963365800f, 0.268190857f,
- 0.962953267f, 0.269668326f,
- 0.962538468f, 0.271145160f,
- 0.962121404f, 0.272621355f,
- 0.961702077f, 0.274096910f,
- 0.961280486f, 0.275571819f,
- 0.960856633f, 0.277046080f,
- 0.960430519f, 0.278519689f,
- 0.960002146f, 0.279992643f,
- 0.959571513f, 0.281464938f,
- 0.959138622f, 0.282936570f,
- 0.958703475f, 0.284407537f,
- 0.958266071f, 0.285877835f,
- 0.957826413f, 0.287347460f,
- 0.957384501f, 0.288816408f,
- 0.956940336f, 0.290284677f,
- 0.956493919f, 0.291752263f,
- 0.956045251f, 0.293219163f,
- 0.955594334f, 0.294685372f,
- 0.955141168f, 0.296150888f,
- 0.954685755f, 0.297615707f,
- 0.954228095f, 0.299079826f,
- 0.953768190f, 0.300543241f,
- 0.953306040f, 0.302005949f,
- 0.952841648f, 0.303467947f,
- 0.952375013f, 0.304929230f,
- 0.951906137f, 0.306389795f,
- 0.951435021f, 0.307849640f,
- 0.950961666f, 0.309308760f,
- 0.950486074f, 0.310767153f,
- 0.950008245f, 0.312224814f,
- 0.949528181f, 0.313681740f,
- 0.949045882f, 0.315137929f,
- 0.948561350f, 0.316593376f,
- 0.948074586f, 0.318048077f,
- 0.947585591f, 0.319502031f,
- 0.947094366f, 0.320955232f,
- 0.946600913f, 0.322407679f,
- 0.946105232f, 0.323859367f,
- 0.945607325f, 0.325310292f,
- 0.945107193f, 0.326760452f,
- 0.944604837f, 0.328209844f,
- 0.944100258f, 0.329658463f,
- 0.943593458f, 0.331106306f,
- 0.943084437f, 0.332553370f,
- 0.942573198f, 0.333999651f,
- 0.942059740f, 0.335445147f,
- 0.941544065f, 0.336889853f,
- 0.941026175f, 0.338333767f,
- 0.940506071f, 0.339776884f,
- 0.939983753f, 0.341219202f,
- 0.939459224f, 0.342660717f,
- 0.938932484f, 0.344101426f,
- 0.938403534f, 0.345541325f,
- 0.937872376f, 0.346980411f,
- 0.937339012f, 0.348418680f,
- 0.936803442f, 0.349856130f,
- 0.936265667f, 0.351292756f,
- 0.935725689f, 0.352728556f,
- 0.935183510f, 0.354163525f,
- 0.934639130f, 0.355597662f,
- 0.934092550f, 0.357030961f,
- 0.933543773f, 0.358463421f,
- 0.932992799f, 0.359895037f,
- 0.932439629f, 0.361325806f,
- 0.931884266f, 0.362755724f,
- 0.931326709f, 0.364184790f,
- 0.930766961f, 0.365612998f,
- 0.930205023f, 0.367040346f,
- 0.929640896f, 0.368466830f,
- 0.929074581f, 0.369892447f,
- 0.928506080f, 0.371317194f,
- 0.927935395f, 0.372741067f,
- 0.927362526f, 0.374164063f,
- 0.926787474f, 0.375586178f,
- 0.926210242f, 0.377007410f,
- 0.925630831f, 0.378427755f,
- 0.925049241f, 0.379847209f,
- 0.924465474f, 0.381265769f,
- 0.923879533f, 0.382683432f,
- 0.923291417f, 0.384100195f,
- 0.922701128f, 0.385516054f,
- 0.922108669f, 0.386931006f,
- 0.921514039f, 0.388345047f,
- 0.920917242f, 0.389758174f,
- 0.920318277f, 0.391170384f,
- 0.919717146f, 0.392581674f,
- 0.919113852f, 0.393992040f,
- 0.918508394f, 0.395401479f,
- 0.917900776f, 0.396809987f,
- 0.917290997f, 0.398217562f,
- 0.916679060f, 0.399624200f,
- 0.916064966f, 0.401029897f,
- 0.915448716f, 0.402434651f,
- 0.914830312f, 0.403838458f,
- 0.914209756f, 0.405241314f,
- 0.913587048f, 0.406643217f,
- 0.912962190f, 0.408044163f,
- 0.912335185f, 0.409444149f,
- 0.911706032f, 0.410843171f,
- 0.911074734f, 0.412241227f,
- 0.910441292f, 0.413638312f,
- 0.909805708f, 0.415034424f,
- 0.909167983f, 0.416429560f,
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