STM32F0: Update to v1.2.0 of the standard peripheral library.
This commit is contained in:
parent
5a811481b9
commit
2d0efc1b48
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File.
|
||||
* This file contains all the peripheral register's definitions, bits
|
||||
* definitions and memory mapping for STM32F0xx devices.
|
||||
|
@ -25,7 +25,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -65,21 +65,29 @@
|
|||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32F0XX)
|
||||
#define STM32F0XX /*!< STM32F0XX: STM32F0xx devices */
|
||||
#if !defined (STM32F0XX_LD) && !defined (STM32F0XX_MD) && !defined (STM32F030)
|
||||
/* #define STM32F0XX_LD */ /*!< STM32F0xx Low-density devices are STM32F050xx and STM32F060xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes */
|
||||
/* #define STM32F0XX_MD */ /*!< STM32F0xx Medium-density devices are STM32F051xx and STM32F061xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes */
|
||||
#define STM32F030 /*!< STM32F030 devices are STM32F030xx value line microcontrollers */
|
||||
#endif
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
|
||||
STM32F0xx devices are:
|
||||
- STM32F050xx microcontrollers where the Flash memory density can go up to 32 Kbytes.
|
||||
- STM32F051xx microcontrollers where the Flash memory density can go up to 64 Kbytes.
|
||||
*/
|
||||
|
||||
#if !defined (STM32F0XX)
|
||||
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||
/* Old STM32F0XX definition, maintained for legacy purpose */
|
||||
#if defined(STM32F0XX)
|
||||
#define STM32F0XX_MD
|
||||
#endif /* STM32F0XX */
|
||||
|
||||
/* Old STM32F030X6/X8 definition, maintained for legacy purpose */
|
||||
#if defined (STM32F030X8) || defined (STM32F030X6)
|
||||
#define STM32F030
|
||||
#endif /* STM32F030X8 or STM32F030X6 */
|
||||
|
||||
#if !defined (STM32F0XX_LD) && !defined (STM32F0XX_MD) && !defined (STM32F030)
|
||||
#error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
|
||||
#endif
|
||||
|
||||
#if !defined USE_STDPERIPH_DRIVER
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
|
@ -105,7 +113,7 @@
|
|||
Timeout value
|
||||
*/
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */
|
||||
#define HSE_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSE start up */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
|
@ -113,7 +121,7 @@
|
|||
Timeout value
|
||||
*/
|
||||
#if !defined (HSI_STARTUP_TIMEOUT)
|
||||
#define HSI_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSI start up */
|
||||
#define HSI_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSI start up */
|
||||
#endif /* HSI_STARTUP_TIMEOUT */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
|
@ -139,10 +147,10 @@
|
|||
#endif /* LSE_VALUE */
|
||||
|
||||
/**
|
||||
* @brief STM32F0xx Standard Peripheral Library version number V1.0.1
|
||||
* @brief STM32F0xx Standard Peripheral Library version number V1.2.1
|
||||
*/
|
||||
#define __STM32F0XX_STDPERIPH_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F0XX_STDPERIPH_VERSION_SUB1 (0x00) /*!< [23:16] sub1 version */
|
||||
#define __STM32F0XX_STDPERIPH_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
|
||||
#define __STM32F0XX_STDPERIPH_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
|
||||
#define __STM32F0XX_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F0XX_STDPERIPH_VERSION ((__STM32F0XX_STDPERIPH_VERSION_MAIN << 24)\
|
||||
|
@ -176,8 +184,8 @@ typedef enum IRQn
|
|||
SVC_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */
|
||||
PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */
|
||||
SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */
|
||||
|
||||
/****** STM32F-0 specific Interrupt Numbers *********************************************************/
|
||||
#if defined (STM32F0XX_MD)
|
||||
/****** STM32F0XX_MD specific Interrupt Numbers ****************************************************/
|
||||
WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
|
||||
PVD_IRQn = 1, /*!< PVD through EXTI Line detect Interrupt */
|
||||
RTC_IRQn = 2, /*!< RTC through EXTI Line Interrupt */
|
||||
|
@ -186,7 +194,7 @@ typedef enum IRQn
|
|||
EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupts */
|
||||
EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupts */
|
||||
EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupts */
|
||||
TS_IRQn = 8, /*!< TS Interrupt */
|
||||
TS_IRQn = 8, /*!< Touch sense controller Interrupt */
|
||||
DMA1_Channel1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */
|
||||
DMA1_Channel2_3_IRQn = 10, /*!< DMA1 Channel 2 and Channel 3 Interrupts */
|
||||
DMA1_Channel4_5_IRQn = 11, /*!< DMA1 Channel 4 and Channel 5 Interrupts */
|
||||
|
@ -207,6 +215,57 @@ typedef enum IRQn
|
|||
USART1_IRQn = 27, /*!< USART1 Interrupt */
|
||||
USART2_IRQn = 28, /*!< USART2 Interrupt */
|
||||
CEC_IRQn = 30 /*!< CEC Interrupt */
|
||||
#elif defined (STM32F0XX_LD)
|
||||
/****** STM32F0XX_LD specific Interrupt Numbers *****************************************************/
|
||||
WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
|
||||
PVD_IRQn = 1, /*!< PVD through EXTI Line detect Interrupt */
|
||||
RTC_IRQn = 2, /*!< RTC through EXTI Line Interrupt */
|
||||
FLASH_IRQn = 3, /*!< FLASH Interrupt */
|
||||
RCC_IRQn = 4, /*!< RCC Interrupt */
|
||||
EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupts */
|
||||
EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupts */
|
||||
EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupts */
|
||||
DMA1_Channel1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */
|
||||
DMA1_Channel2_3_IRQn = 10, /*!< DMA1 Channel 2 and Channel 3 Interrupts */
|
||||
DMA1_Channel4_5_IRQn = 11, /*!< DMA1 Channel 4 and Channel 5 Interrupts */
|
||||
ADC1_IRQn = 12, /*!< ADC1 Interrupt */
|
||||
TIM1_BRK_UP_TRG_COM_IRQn = 13, /*!< TIM1 Break, Update, Trigger and Commutation Interrupts */
|
||||
TIM1_CC_IRQn = 14, /*!< TIM1 Capture Compare Interrupt */
|
||||
TIM2_IRQn = 15, /*!< TIM2 Interrupt */
|
||||
TIM3_IRQn = 16, /*!< TIM3 Interrupt */
|
||||
TIM14_IRQn = 19, /*!< TIM14 Interrupt */
|
||||
TIM16_IRQn = 21, /*!< TIM16 Interrupt */
|
||||
TIM17_IRQn = 22, /*!< TIM17 Interrupt */
|
||||
I2C1_IRQn = 23, /*!< I2C1 Interrupt */
|
||||
SPI1_IRQn = 25, /*!< SPI1 Interrupt */
|
||||
USART1_IRQn = 27 /*!< USART1 Interrupt */
|
||||
#elif defined (STM32F030)
|
||||
/****** STM32F030 specific Interrupt Numbers ********************************************************/
|
||||
WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
|
||||
RTC_IRQn = 2, /*!< RTC through EXTI Line Interrupt */
|
||||
FLASH_IRQn = 3, /*!< FLASH Interrupt */
|
||||
RCC_IRQn = 4, /*!< RCC Interrupt */
|
||||
EXTI0_1_IRQn = 5, /*!< EXTI Line 0 and 1 Interrupts */
|
||||
EXTI2_3_IRQn = 6, /*!< EXTI Line 2 and 3 Interrupts */
|
||||
EXTI4_15_IRQn = 7, /*!< EXTI Line 4 to 15 Interrupts */
|
||||
DMA1_Channel1_IRQn = 9, /*!< DMA1 Channel 1 Interrupt */
|
||||
DMA1_Channel2_3_IRQn = 10, /*!< DMA1 Channel 2 and Channel 3 Interrupts */
|
||||
DMA1_Channel4_5_IRQn = 11, /*!< DMA1 Channel 4 and Channel 5 Interrupts */
|
||||
ADC1_IRQn = 12, /*!< ADC1 Interrupt */
|
||||
TIM1_BRK_UP_TRG_COM_IRQn = 13, /*!< TIM1 Break, Update, Trigger and Commutation Interrupts */
|
||||
TIM1_CC_IRQn = 14, /*!< TIM1 Capture Compare Interrupt */
|
||||
TIM3_IRQn = 16, /*!< TIM3 Interrupt */
|
||||
TIM14_IRQn = 19, /*!< TIM14 Interrupt */
|
||||
TIM15_IRQn = 20, /*!< TIM15 Interrupt */
|
||||
TIM16_IRQn = 21, /*!< TIM16 Interrupt */
|
||||
TIM17_IRQn = 22, /*!< TIM17 Interrupt */
|
||||
I2C1_IRQn = 23, /*!< I2C1 Interrupt */
|
||||
I2C2_IRQn = 24, /*!< I2C2 Interrupt */
|
||||
SPI1_IRQn = 25, /*!< SPI1 Interrupt */
|
||||
SPI2_IRQn = 26, /*!< SPI2 Interrupt */
|
||||
USART1_IRQn = 27, /*!< USART1 Interrupt */
|
||||
USART2_IRQn = 28 /*!< USART2 Interrupt */
|
||||
#endif /* STM32F0XX_MD */
|
||||
} IRQn_Type;
|
||||
|
||||
/**
|
||||
|
@ -1389,7 +1448,7 @@ typedef struct
|
|||
/* Old BOOT1 bit definition, maintained for legacy purpose */
|
||||
#define FLASH_OBR_BOOT1 FLASH_OBR_nBOOT1
|
||||
|
||||
/* Old BOOT1 bit definition, maintained for legacy purpose */
|
||||
/* Old OBR_VDDA bit definition, maintained for legacy purpose */
|
||||
#define FLASH_OBR_VDDA_ANALOG FLASH_OBR_VDDA_MONITOR
|
||||
|
||||
/****************** Bit definition for FLASH_WRPR register ******************/
|
||||
|
@ -2002,6 +2061,18 @@ typedef struct
|
|||
#define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */
|
||||
#define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */
|
||||
|
||||
#define RCC_CFGR_MCO_PRE ((uint32_t)0x70000000) /*!< MCO prescaler (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_1 ((uint32_t)0x00000000) /*!< MCO is divided by 1 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_2 ((uint32_t)0x10000000) /*!< MCO is divided by 2 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_4 ((uint32_t)0x20000000) /*!< MCO is divided by 4 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_8 ((uint32_t)0x30000000) /*!< MCO is divided by 8 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_16 ((uint32_t)0x40000000) /*!< MCO is divided by 16 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_32 ((uint32_t)0x50000000) /*!< MCO is divided by 32 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_64 ((uint32_t)0x60000000) /*!< MCO is divided by 64 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
#define RCC_CFGR_MCO_PRE_128 ((uint32_t)0x70000000) /*!< MCO is divided by 128 (only for STM32F0XX_LD and STM32FO30X6 devices)*/
|
||||
|
||||
#define RCC_CFGR_PLLNODIV ((uint32_t)0x80000000) /*!< PLL is not divided to MCO (only for STM32F0XX_LD and STM32FO30X6 devices) */
|
||||
|
||||
/*!<****************** Bit definition for RCC_CIR register ********************/
|
||||
#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) /*!< LSI Ready Interrupt flag */
|
||||
#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) /*!< LSE Ready Interrupt flag */
|
||||
|
@ -2545,6 +2616,9 @@ typedef struct
|
|||
#define SYSCFG_CFGR1_I2C_FMP_PB7 ((uint32_t)0x00020000) /*!< I2C PB7 Fast mode plus */
|
||||
#define SYSCFG_CFGR1_I2C_FMP_PB8 ((uint32_t)0x00040000) /*!< I2C PB8 Fast mode plus */
|
||||
#define SYSCFG_CFGR1_I2C_FMP_PB9 ((uint32_t)0x00080000) /*!< I2C PB9 Fast mode plus */
|
||||
#define SYSCFG_CFGR1_I2C_FMP_I2C1 ((uint32_t)0x00100000) /*!< Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0XX_LD and STM32FO30X6 devices) */
|
||||
#define SYSCFG_CFGR1_I2C_FMP_PA9 ((uint32_t)0x00400000) /*!< Enable Fast Mode Plus on PA9 (only for STM32F0XX_LD and STM32FO30X6 devices) */
|
||||
#define SYSCFG_CFGR1_I2C_FMP_PA10 ((uint32_t)0x00800000) /*!< Enable Fast Mode Plus on PA10(only for STM32F0XX_LD and STM32FO30X6 devices) */
|
||||
|
||||
/***************** Bit definition for SYSCFG_EXTICR1 register ***************/
|
||||
#define SYSCFG_EXTICR1_EXTI0 ((uint16_t)0x000F) /*!< EXTI 0 configuration */
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f0xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
@ -6,6 +6,9 @@
|
|||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F0xx CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
@ -81,7 +84,7 @@ div.Section1
|
|||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes for STM32F0xx CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright 2013 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../_htmresc/logo.bmp" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
|
@ -100,7 +103,76 @@ update History</a><o:p></o:p></span></li>
|
|||
</ol>
|
||||
<span style="font-family: "Times New Roman";"></span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F0xx CMSIS
|
||||
update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
update History</span></h2><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.1 / 22-November-2013</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update STM32F030 devices definition: <br>
|
||||
</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Remove the <span style="font-style: italic;">STM32F030X8 and STM32FO30X6</span> defines and replace them with the </span><span style="font-size: 10pt; font-family: Verdana;">S<span style="font-style: italic;">TM32F030 define</span></span></li></ul></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">IRQn</span> enum for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F030</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">system_stm32f0xx.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span>: update to support <span style="font-style: italic;">STM32F030</span> devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Remove the startup files </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">startup_stm32f030x8.s and startup_stm32f030x6.s</span> and replace them by </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">startup_stm32f030.s</span></span><span style="font-size: 10pt; font-family: Verdana;">, for EWARM, MDK-ARM and Truestudio supported compilers</span></li></ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 01-August-2013</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support of <span style="font-weight: bold; font-style: italic;">STM32F030 devices</span> (STM32F030x8 and STM32F030x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update STM32F0xx devices definition: <br>
|
||||
</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new definition <span style="font-style: italic;">STM32F030X8 and STM32FO30X6</span> for </span><span style="font-size: 10pt; font-family: Verdana;">S<span style="font-style: italic;">TM32F030 devices</span></span></li></ul></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">IRQn</span> enum for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F030</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">system_stm32f0xx.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span>: update to support <span style="font-style: italic;">STM32F030</span> devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new startup files, </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">startup_stm32f030x8.s and startup_stm32f030x6.s</span>, for EWARM, MDK-ARM and Truestudio supported compilers</span></li></ul>
|
||||
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1 / 31-July-2013</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Extend <span style="font-style: italic;">HSE_STARTUP_TIMEOUT</span> and <span style="font-style: italic;">HSI_STARTUP_TIMEOUT</span> values to 0x5000</span></li></ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 10-May-2013</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support of <span style="font-weight: bold; font-style: italic;">STM32F0xx Low-density devices</span> (STM32F050xx and STM32F060xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update STM32F0xx devices definition: <br>
|
||||
</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Define for <span style="font-style: italic;">STM32F0xx Medium-density devices</span> changed from <span style="font-style: italic;">STM32F0XX</span> to <span style="font-style: italic;">STM32F0XX_MD</span><br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new definition <span style="font-style: italic;">STM32F0XX_LD</span> for </span><span style="font-size: 10pt; font-family: Verdana;">S<span style="font-style: italic;">TM32F0xx Low-density devices</span></span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">IRQn</span> enum for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F0XX_LD</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new bits definition</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_CFGR</span></span><span style="font-size: 10pt; font-family: Verdana;"> register</span><span style="font-size: 10pt; font-family: Verdana;">: <span style="font-style: italic;">MCOPRE[0:2]</span> and <span style="font-style: italic;">PLLNODIV</span></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SYSCFG_CFGR1</span> register: <span style="font-style: italic;">FMP_I2C1</span>, <span style="font-style: italic;">FMP_PA9</span> and <span style="font-style: italic;">FMP_PA10</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">system_stm32f0xx.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">SystemInit()</span>: update to reset new bits added in </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_CFGR</span></span><span style="font-size: 10pt; font-family: Verdana;"> register</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new startup files, </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">startup_stm32f0xx_ld.s</span>, for the supported compilers</span></li>
|
||||
</ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.2 / 13-July-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Fix issue with gcc_ride7 startup file </span><span style="font-size: 10pt; font-family: Verdana;"></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add reference to STM32F050xx (Flash memory up to 32 Kbytes) and STM32F051xx (</span><span style="font-size: 10pt; font-family: Verdana;">Flash memory up to 64 Kbytes</span><span style="font-size: 10pt; font-family: Verdana;">) devices</span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">RTC register bits definition: remove reference to Tamper3</span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 / 23-March-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
|
|
@ -0,0 +1,108 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.tasking.config.arm.abs.debug.2044455393">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="com.tasking.managedbuilder.TASKING_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="com.tasking.managedbuilder.TskRegexErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactExtension="abs" artifactName="STM32F0XX_LD(STM32F0x0xx)" buildArtefactType="com.tasking.arm.buildArtefactType.elf" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.tasking.arm.buildArtefactType.elf" cleanCommand=""${PRODDIR}/bin/rm" -rf" description="" id="com.tasking.config.arm.abs.debug.2044455393" name="Debug" parent="com.tasking.config.arm.abs.debug">
|
||||
<folderInfo id="com.tasking.config.arm.abs.debug.2044455393." name="/" resourcePath="">
|
||||
<toolChain id="com.tasking.arm.abs.debug.315882766" name="TASKING VX-toolset for ARM" superClass="com.tasking.arm.abs.debug">
|
||||
<option id="com.tasking.arm.pluginVersion.306560835" name="Plugin version" superClass="com.tasking.arm.pluginVersion" value="1.109.0.0" valueType="string"/>
|
||||
<option id="com.tasking.arm.prodDir.527888595" name="Product directory:" superClass="com.tasking.arm.prodDir" value="${eclipse_home}/.." valueType="string"/>
|
||||
<option id="com.tasking.arm.cpu.1659227005" name="Processor:" superClass="com.tasking.arm.cpu" value="stm32f050c6" valueType="string"/>
|
||||
<option id="com.tasking.arm.globalOptions.endianness.847552914" name="Endianness:" superClass="com.tasking.arm.globalOptions.endianness" value="com.tasking.arm.globalOptions.endianness.little" valueType="enumerated"/>
|
||||
<targetPlatform archList="all" binaryParser="com.tasking.managedbuilder.TASKING_ELF" id="com.tasking.arm.platform.abs.debug.2077143327" name="Debug" osList="" superClass="com.tasking.arm.platform.abs.debug"/>
|
||||
<builder buildPath="${workspace_loc:/STM3210B-EVAL/Debug}" id="com.tasking.arm.builder.abs.debug.1207760117" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="TASKING ARM Makefile generator" parallelBuildOn="true" parallelizationNumber="unlimited" superClass="com.tasking.arm.builder.abs.debug"/>
|
||||
<tool id="com.tasking.arm.cc.abs.debug.1657066278" name="C/C++ Compiler" superClass="com.tasking.arm.cc.abs.debug">
|
||||
<option id="com.tasking.arm.cc.pr36858.1629322841" name="workaround for PR36858" superClass="com.tasking.arm.cc.pr36858" value="true" valueType="string"/>
|
||||
<option id="com.tasking.arm.cc.includePaths.449008655" name="Include paths" superClass="com.tasking.arm.cc.includePaths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\CMSIS\Include"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\CMSIS\Device\ST\STM32F0xx\Include"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\STM32F0xx_StdPeriph_Driver\inc"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\STM32F0xx_CPAL_Driver\inc"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Utilities\STM32_EVAL\STM320518_EVAL"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Utilities\STM32_EVAL\Common"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.definedSymbols.2139466164" name="Defined symbols" superClass="com.tasking.arm.cc.definedSymbols" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="USE_STDPERIPH_DRIVER"/>
|
||||
<listOptionValue builtIn="false" value="STM32F0XX_LD"/>
|
||||
<listOptionValue builtIn="false" value="USE_DEFAULT_TIMEOUT_CALLBACK"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.optimize.1365289574" name="Optimization level:" superClass="com.tasking.arm.cc.optimize" value="com.tasking.arm.cc.optimize.3" valueType="enumerated"/>
|
||||
<option id="com.tasking.arm.cc.tradeoff.1958267302" name="Trade-off between speed and size:" superClass="com.tasking.arm.cc.tradeoff" value="com.tasking.arm.cc.tradeoff.4" valueType="enumerated"/>
|
||||
<option id="com.tasking.arm.cc.globalTypeChecking.1184544748" name="Perform global type checking on C code" superClass="com.tasking.arm.cc.globalTypeChecking" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.nowarning.398961799" name="Suppress C compiler warnings" superClass="com.tasking.arm.cc.nowarning" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value="557"/>
|
||||
<listOptionValue builtIn="false" value="588"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.defaultHeaderFile.1126538551" name="Include CMSIS device register definition header file" superClass="com.tasking.arm.cc.defaultHeaderFile" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.cmsisIncludePaths.1232400927" name="Add CMSIS include paths" superClass="com.tasking.arm.cc.cmsisIncludePaths" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.codeGeneration.useFpu.1037423562" name="Use FPU" superClass="com.tasking.arm.cc.codeGeneration.useFpu" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.additionalOptions.2089822954" name="Additional options:" superClass="com.tasking.arm.cc.additionalOptions" value="" valueType="string"/>
|
||||
<option id="com.tasking.arm.cc.codeGeneration.Thumb.51606921" name="Use Thumb instruction set" superClass="com.tasking.arm.cc.codeGeneration.Thumb" value="true" valueType="boolean"/>
|
||||
<inputType id="com.tasking.arm.cppInputType.78394475" name="C++" superClass="com.tasking.arm.cppInputType"/>
|
||||
<inputType id="com.tasking.arm.cpp.cInputType.609856589" name="C" superClass="com.tasking.arm.cpp.cInputType"/>
|
||||
<inputType id="com.tasking.arm.cc.msInputType.765887363" name="MS" superClass="com.tasking.arm.cc.msInputType"/>
|
||||
</tool>
|
||||
<tool id="com.tasking.arm.as.abs.debug.1696826359" name="Assembler" superClass="com.tasking.arm.as.abs.debug">
|
||||
<option id="com.tasking.arm.as.nowarnings.1345499014" name="Suppress all warnings" superClass="com.tasking.arm.as.nowarnings" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.as.definedSymbols.1925183717" name="Defined symbols" superClass="com.tasking.arm.as.definedSymbols"/>
|
||||
<option id="com.tasking.arm.as.includePaths.762676103" name="Include paths" superClass="com.tasking.arm.as.includePaths"/>
|
||||
<option id="com.tasking.arm.as.additionalOptions.1602992317" name="Additional options:" superClass="com.tasking.arm.as.additionalOptions" value="" valueType="string"/>
|
||||
<inputType id="com.tasking.arm.asmInputType.1662245119" name="ASM" superClass="com.tasking.arm.asmInputType"/>
|
||||
</tool>
|
||||
<tool id="com.tasking.arm.lk.abs.debug.666839530" name="Linker" superClass="com.tasking.arm.lk.abs.debug">
|
||||
<option id="com.tasking.arm.lk.lslFile.578724675" name="Linker script file:" superClass="com.tasking.arm.lk.lslFile" value="../TASKING/stm32f0xx_ld.lsl" valueType="string"/>
|
||||
<option id="com.tasking.arm.lk.library.1866270609" name="Libraries" superClass="com.tasking.arm.lk.library"/>
|
||||
<option id="com.tasking.arm.lk.libraryDirectory.122337355" name="Library search path" superClass="com.tasking.arm.lk.libraryDirectory"/>
|
||||
<option id="com.tasking.arm.lk.additionalOptions.2095335915" name="Additional options:" superClass="com.tasking.arm.lk.additionalOptions" value="" valueType="string"/>
|
||||
<inputType id="com.tasking.arm.lkObjInputType.1921927729" name="OBJ" superClass="com.tasking.arm.lkObjInputType"/>
|
||||
<inputType id="com.tasking.arm.lkLibInputType.1525417255" name="LIB" superClass="com.tasking.arm.lkLibInputType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
<storageModule moduleId="com.tasking.toolInfo">
|
||||
<toolInfo>TASKING program builder v4.4r1 Build 077</toolInfo>
|
||||
<toolInfo>TASKING VX-toolset for ARM Cortex: assembler v4.4r1 Build 155</toolInfo>
|
||||
<toolInfo>TASKING VX-toolset for ARM Cortex: control program v4.4r1 Build 132</toolInfo>
|
||||
<toolInfo>TASKING VX-toolset for ARM Cortex: object linker (TRIAL VERS v4.4r1 Build 153</toolInfo>
|
||||
<toolInfo>TASKING VX-toolset for ARM Cortex: C compiler (TRIAL VERSION v4.4r1 Build 765</toolInfo>
|
||||
</storageModule>
|
||||
<storageModule addStartupFiles="false" moduleId="com.tasking.processor" updateRefProjects="true"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="STM3210B-EVAL.com.tasking.arm.target.abs.491846486" name="TASKING ARM Application" projectType="com.tasking.arm.target.abs"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.release.1258418627;com.tasking.config.arm.abs.release.1258418627.">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.debug.2044455393;com.tasking.config.arm.abs.debug.2044455393.">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping">
|
||||
<project-mappings>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.tasking.arm.clanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.tasking.arm.clanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.tasking.arm.cpplanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.tasking.arm.cpplanguage"/>
|
||||
</project-mappings>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope" versionNumber="1">
|
||||
<resource resourceType="PROJECT" workspacePath="/STM3210B-EVAL"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
</cproject>
|
|
@ -0,0 +1,162 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>STM32F0XX_LD(STM32F0x0xx)</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>com.tasking.arm.TskManagedBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>com.tasking.arm.target</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>CMSIS</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>CMSIS/startup_stm32f0xx_ld.s</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx_ld.s</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>CMSIS/system_stm32f0xx.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/system_stm32f0xx.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_adc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_cec.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_comp.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_crc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dac.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dbgmcu.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dma.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_exti.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_flash.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_gpio.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_i2c.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_iwdg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_misc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_pwr.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_rcc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_rtc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_spi.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_syscfg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_tim.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_usart.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_wwdg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/main.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/main.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/stm32f0xx_it.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/stm32f0xx_it.c</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
|
@ -0,0 +1,45 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.tasking.cdt.launch.localCLaunch">
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.ATTR_RUN_IN_SEPARATE_PROCESS" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (SWD)"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM320518-EVAL"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/>
|
||||
<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f051xx.sre"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="SWD"/>
|
||||
<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/>
|
||||
<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${build_config}\STM32F0XX_LD(STM32F0x0xx).abs"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32F0XX_LD(STM32F0x0xx)"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/STM32F0XX_LD(STM32F0x0xx)"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="false"/>
|
||||
</launchConfiguration>
|
|
@ -0,0 +1,155 @@
|
|||
///////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// File : stm32f0xx.lsl
|
||||
//
|
||||
// Version : @(#)stm32f0xx.lsl 1.5 11/06/30
|
||||
//
|
||||
// Description : LSL file for the STMicroelectronics STM32F0xx
|
||||
//
|
||||
// Copyright 2010-2011 Altium BV
|
||||
//
|
||||
// Macros specific to control this LSL file
|
||||
//
|
||||
// __MEMORY Define this macro to suppress definition of on-chip
|
||||
// memory. Must be defined when you want to define on-chip
|
||||
// in your project's LSL file.
|
||||
// __FLASH_SIZE Specifies the size of flash memory to be allocated
|
||||
// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated
|
||||
// __EEPROM_SIZE Specifies the size of the EEPROM memory to be allocated
|
||||
// __NO_DEFAULT_AUTO_VECTORS
|
||||
// When enabled the interrupt vector table will not be
|
||||
// generated
|
||||
// __VECTOR_TABLE_RAM_COPY
|
||||
// Define this macro to enable copying the vector table
|
||||
// at startup from ROM to RAM.
|
||||
// __VECTOR_TABLE_ROM_ADDR
|
||||
// Specify the vector table address in ROM
|
||||
// __VECTOR_TABLE_RAM_ADDR
|
||||
// Specify the vector table address in RAM when the the
|
||||
// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY)
|
||||
//
|
||||
// See arm_arch.lsl for more available macros.
|
||||
//
|
||||
// Notes:
|
||||
// In the STM32F0xx, 3 different boot modes can be selected
|
||||
// - User Flash memory is selected as boot space
|
||||
// - SystemMemory is selected as boot space
|
||||
// - Embedded SRAM is selected as boot space
|
||||
//
|
||||
// This aliases the physical memory associated with each boot mode to Block
|
||||
// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
|
||||
// the related memory (Flash memory or SRAM) is still accessible at its
|
||||
// original memory space.
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef __NO_DEFAULT_AUTO_VECTORS
|
||||
// Suppress the vectors as defined arm_arch.lsl, because we define our
|
||||
// own vectors for CMIS
|
||||
#define __CMSIS_VECTORS 1
|
||||
#define __NO_DEFAULT_AUTO_VECTORS 1
|
||||
#define __NR_OF_VECTORS 47
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_ROM_ADDR
|
||||
# define __VECTOR_TABLE_ROM_ADDR 0x08000000
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_RAM_ADDR
|
||||
# define __VECTOR_TABLE_RAM_ADDR 0x00000000
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __STACK
|
||||
# define __STACK 0x400
|
||||
#endif
|
||||
|
||||
#ifndef __HEAP
|
||||
# define __HEAP 0x200
|
||||
#endif
|
||||
|
||||
#include <arm_arch.lsl>
|
||||
|
||||
//
|
||||
// If no memory is defined yet use the following memory settings
|
||||
//
|
||||
#ifndef __MEMORY
|
||||
|
||||
// Specify default size for Flash and SRAM
|
||||
#ifndef __FLASH_SIZE
|
||||
# define __FLASH_SIZE 32k
|
||||
#endif
|
||||
#ifndef __SRAM_SIZE
|
||||
# define __SRAM_SIZE 8k
|
||||
#endif
|
||||
|
||||
memory STM32F0xx_Flash
|
||||
{
|
||||
mau = 8;
|
||||
type = rom;
|
||||
size = __FLASH_SIZE;
|
||||
map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus);
|
||||
}
|
||||
|
||||
memory STM32F0xx_SRAM
|
||||
{
|
||||
mau = 8;
|
||||
type = ram;
|
||||
size = __SRAM_SIZE;
|
||||
map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus);
|
||||
}
|
||||
|
||||
#endif /* __MEMORY */
|
||||
|
||||
|
||||
//
|
||||
// Custom vector table defines interrupts according to CMSIS standard
|
||||
//
|
||||
# if defined(__CPU_ARMV6M__)
|
||||
section_setup ::linear
|
||||
{
|
||||
// vector table with handler addresses
|
||||
vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR,
|
||||
template = ".text.handler_address",
|
||||
template_symbol = "_lc_vector_handler",
|
||||
vector_prefix = "_vector_",
|
||||
__VECTOR_TABLE_COPY_ATTRIBUTE
|
||||
fill = loop,
|
||||
no_inline
|
||||
)
|
||||
{
|
||||
vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack
|
||||
vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler
|
||||
vector ( id = 2, optional, fill = "NMI_Handler" );
|
||||
vector ( id = 3, optional, fill = "HardFault_Handler" );
|
||||
vector ( id = 11, optional, fill = "SVC_Handler" );
|
||||
vector ( id = 14, optional, fill = "PendSV_Handler" );
|
||||
vector ( id = 15, optional, fill = "SysTick_Handler" );
|
||||
|
||||
// External Interrupts :
|
||||
vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog
|
||||
vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect
|
||||
vector ( id = 18, optional, fill = "RTC_IRQHandler" ); // RTC
|
||||
vector ( id = 19, optional, fill = "FLASH_IRQHandler" ); // Flash
|
||||
vector ( id = 20, optional, fill = "RCC_IRQHandler" ); // RCC
|
||||
vector ( id = 21, optional, fill = "EXTI0_1_IRQHandler" ); // EXTI Line 0 and 1
|
||||
vector ( id = 22, optional, fill = "EXTI2_3_IRQHandler" ); // EXTI Line 2 and 3
|
||||
vector ( id = 23, optional, fill = "EXTI4_15_IRQHandler" ); // EXTI Line 4 to 15
|
||||
vector ( id = 25, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1
|
||||
vector ( id = 26, optional, fill = "DMA1_Channel2_3_IRQHandler" ); // DMA1 Channel 2 and Channel 3
|
||||
vector ( id = 27, optional, fill = "DMA1_Channel4_5_IRQHandler" ); // DMA1 Channel 4 and Channel 5
|
||||
vector ( id = 28, optional, fill = "ADC1_COMP_IRQHandler" ); // ADC1, COMP1 and COMP2
|
||||
vector ( id = 29, optional, fill = "TIM1_BRK_UP_TRG_COM_IRQHandler" ); // TIM1 Break, Update, Trigger and Commutation
|
||||
vector ( id = 30, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare
|
||||
vector ( id = 31, optional, fill = "TIM2_IRQHandler" ); // TIM2
|
||||
vector ( id = 32, optional, fill = "TIM3_IRQHandler" ); // TIM3
|
||||
vector ( id = 35, optional, fill = "TIM14_IRQHandler" ); // TIM14
|
||||
vector ( id = 37, optional, fill = "TIM16_IRQHandler" ); // TIM16
|
||||
vector ( id = 38, optional, fill = "TIM17_IRQHandler" ); // TIM17
|
||||
vector ( id = 39, optional, fill = "I2C1_IRQHandler" ); // I2C1
|
||||
vector ( id = 41, optional, fill = "SPI1_IRQHandler" ); // SPI1
|
||||
vector ( id = 43, optional, fill = "USART1_IRQHandler" ); // USART1
|
||||
|
||||
}
|
||||
}
|
||||
# endif
|
|
@ -0,0 +1,60 @@
|
|||
/**
|
||||
@page TASKING_STM32F0xx TASKING Project Template for STM32F0xx Low Density devices
|
||||
|
||||
@verbatim
|
||||
******************* (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
* @file readme.txt
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This sub-directory contains all the user-modifiable files needed
|
||||
* to create a new project linked with the STM32F0xx Standard Peripheral
|
||||
* Library and working with TASKING VX-toolset for ARM Cortex-M.
|
||||
******************************************************************************
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
@endverbatim
|
||||
|
||||
@par Directory contents
|
||||
|
||||
- .cproject/.project: A pre-configured project file with the provided library
|
||||
structure that produces an executable image with TASKING.
|
||||
|
||||
- TASKING : This folder contains
|
||||
|
||||
- stm32f0xx_ld.lsl : This file is TASKING linker script that contains the
|
||||
STM32F0xx vector table and used to place program code (readonly)
|
||||
in internal FLASH and data (readwrite, Stack and Heap)in
|
||||
internal SRAM.
|
||||
You can customize this file to your need.
|
||||
|
||||
|
||||
@par How to use it ?
|
||||
|
||||
- Open TASKING toolchain.
|
||||
- Click on File->Import, select General->'Existing Projects into Workspace'
|
||||
and then click "Next".
|
||||
- Browse to TASKING workspace directory and select the project:
|
||||
- STM32F0XX_LD(STM32F0x0xx): to configure the project for STM32F0xx Low Density devices.
|
||||
- Rebuild all project files: Select the project in the "Project explorer"
|
||||
window then click on Project->build project menu.
|
||||
- Run program: Select the project in the "Project explorer" window then click
|
||||
Run->Debug (F11)
|
||||
|
||||
@note The needed define symbols for this config are already declared in the
|
||||
preprocessor section: STM32F0XX_LD, USE_STDPERIPH_DRIVER ,USE_DEFAULT_TIMEOUT_CALLBACK
|
||||
|
||||
* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
|
||||
*/
|
|
@ -0,0 +1,105 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.tasking.config.arm.abs.debug.2044455393">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="com.tasking.managedbuilder.TASKING_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="com.tasking.managedbuilder.TskRegexErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactExtension="abs" artifactName="STM32F0XX_MD(STM32F0x1xx)" buildArtefactType="com.tasking.arm.buildArtefactType.elf" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.tasking.arm.buildArtefactType.elf" cleanCommand=""${PRODDIR}/bin/rm" -rf" description="" id="com.tasking.config.arm.abs.debug.2044455393" name="Debug" parent="com.tasking.config.arm.abs.debug">
|
||||
<folderInfo id="com.tasking.config.arm.abs.debug.2044455393." name="/" resourcePath="">
|
||||
<toolChain id="com.tasking.arm.abs.debug.315882766" name="TASKING VX-toolset for ARM" superClass="com.tasking.arm.abs.debug">
|
||||
<option id="com.tasking.arm.pluginVersion.306560835" name="Plugin version" superClass="com.tasking.arm.pluginVersion" value="1.109.0.0" valueType="string"/>
|
||||
<option id="com.tasking.arm.prodDir.527888595" name="Product directory:" superClass="com.tasking.arm.prodDir" value="${eclipse_home}/.." valueType="string"/>
|
||||
<option id="com.tasking.arm.cpu.1659227005" name="Processor:" superClass="com.tasking.arm.cpu" value="stm32f051r8" valueType="string"/>
|
||||
<option id="com.tasking.arm.globalOptions.endianness.847552914" name="Endianness:" superClass="com.tasking.arm.globalOptions.endianness" value="com.tasking.arm.globalOptions.endianness.little" valueType="enumerated"/>
|
||||
<targetPlatform archList="all" binaryParser="com.tasking.managedbuilder.TASKING_ELF" id="com.tasking.arm.platform.abs.debug.2077143327" name="Debug" osList="" superClass="com.tasking.arm.platform.abs.debug"/>
|
||||
<builder buildPath="${workspace_loc:/STM3210B-EVAL/Debug}" id="com.tasking.arm.builder.abs.debug.1207760117" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="TASKING ARM Makefile generator" parallelBuildOn="true" parallelizationNumber="unlimited" superClass="com.tasking.arm.builder.abs.debug"/>
|
||||
<tool id="com.tasking.arm.cc.abs.debug.1657066278" name="C/C++ Compiler" superClass="com.tasking.arm.cc.abs.debug">
|
||||
<option id="com.tasking.arm.cc.pr36858.1629322841" name="workaround for PR36858" superClass="com.tasking.arm.cc.pr36858" value="true" valueType="string"/>
|
||||
<option id="com.tasking.arm.cc.includePaths.449008655" name="Include paths" superClass="com.tasking.arm.cc.includePaths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\CMSIS\Include"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\CMSIS\Device\ST\STM32F0xx\Include"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\STM32F0xx_StdPeriph_Driver\inc"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Libraries\STM32F0xx_CPAL_Driver\inc"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Utilities\STM32_EVAL\Common"/>
|
||||
<listOptionValue builtIn="false" value="..\..\.\..\..\..\Utilities\STM32_EVAL\STM320518_EVAL"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.definedSymbols.2139466164" name="Defined symbols" superClass="com.tasking.arm.cc.definedSymbols" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="USE_STDPERIPH_DRIVER"/>
|
||||
<listOptionValue builtIn="false" value="STM32F0XX_MD"/>
|
||||
<listOptionValue builtIn="false" value="USE_STM320518_EVAL"/>
|
||||
<listOptionValue builtIn="false" value="USE_DEFAULT_TIMEOUT_CALLBACK"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.optimize.1365289574" name="Optimization level:" superClass="com.tasking.arm.cc.optimize" value="com.tasking.arm.cc.optimize.3" valueType="enumerated"/>
|
||||
<option id="com.tasking.arm.cc.tradeoff.1958267302" name="Trade-off between speed and size:" superClass="com.tasking.arm.cc.tradeoff" value="com.tasking.arm.cc.tradeoff.4" valueType="enumerated"/>
|
||||
<option id="com.tasking.arm.cc.globalTypeChecking.1184544748" name="Perform global type checking on C code" superClass="com.tasking.arm.cc.globalTypeChecking" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.nowarning.398961799" name="Suppress C compiler warnings" superClass="com.tasking.arm.cc.nowarning" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value="557"/>
|
||||
<listOptionValue builtIn="false" value="588"/>
|
||||
</option>
|
||||
<option id="com.tasking.arm.cc.defaultHeaderFile.1126538551" name="Include CMSIS device register definition header file" superClass="com.tasking.arm.cc.defaultHeaderFile" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.cmsisIncludePaths.1232400927" name="Add CMSIS include paths" superClass="com.tasking.arm.cc.cmsisIncludePaths" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.codeGeneration.useFpu.1037423562" name="Use FPU" superClass="com.tasking.arm.cc.codeGeneration.useFpu" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.cc.additionalOptions.2089822954" name="Additional options:" superClass="com.tasking.arm.cc.additionalOptions" value="" valueType="string"/>
|
||||
<option id="com.tasking.arm.cc.codeGeneration.Thumb.51606921" name="Use Thumb instruction set" superClass="com.tasking.arm.cc.codeGeneration.Thumb" value="true" valueType="boolean"/>
|
||||
<inputType id="com.tasking.arm.cppInputType.78394475" name="C++" superClass="com.tasking.arm.cppInputType"/>
|
||||
<inputType id="com.tasking.arm.cpp.cInputType.609856589" name="C" superClass="com.tasking.arm.cpp.cInputType"/>
|
||||
<inputType id="com.tasking.arm.cc.msInputType.765887363" name="MS" superClass="com.tasking.arm.cc.msInputType"/>
|
||||
</tool>
|
||||
<tool id="com.tasking.arm.as.abs.debug.1696826359" name="Assembler" superClass="com.tasking.arm.as.abs.debug">
|
||||
<option id="com.tasking.arm.as.nowarnings.1345499014" name="Suppress all warnings" superClass="com.tasking.arm.as.nowarnings" value="false" valueType="boolean"/>
|
||||
<option id="com.tasking.arm.as.definedSymbols.1925183717" name="Defined symbols" superClass="com.tasking.arm.as.definedSymbols"/>
|
||||
<option id="com.tasking.arm.as.includePaths.762676103" name="Include paths" superClass="com.tasking.arm.as.includePaths"/>
|
||||
<option id="com.tasking.arm.as.additionalOptions.1602992317" name="Additional options:" superClass="com.tasking.arm.as.additionalOptions" value="" valueType="string"/>
|
||||
<inputType id="com.tasking.arm.asmInputType.1662245119" name="ASM" superClass="com.tasking.arm.asmInputType"/>
|
||||
</tool>
|
||||
<tool id="com.tasking.arm.lk.abs.debug.666839530" name="Linker" superClass="com.tasking.arm.lk.abs.debug">
|
||||
<option id="com.tasking.arm.lk.lslFile.578724675" name="Linker script file:" superClass="com.tasking.arm.lk.lslFile" value="../TASKING/stm32f0xx.lsl" valueType="string"/>
|
||||
<option id="com.tasking.arm.lk.library.1866270609" name="Libraries" superClass="com.tasking.arm.lk.library"/>
|
||||
<option id="com.tasking.arm.lk.libraryDirectory.122337355" name="Library search path" superClass="com.tasking.arm.lk.libraryDirectory"/>
|
||||
<option id="com.tasking.arm.lk.additionalOptions.2095335915" name="Additional options:" superClass="com.tasking.arm.lk.additionalOptions" value="" valueType="string"/>
|
||||
<inputType id="com.tasking.arm.lkObjInputType.1921927729" name="OBJ" superClass="com.tasking.arm.lkObjInputType"/>
|
||||
<inputType id="com.tasking.arm.lkLibInputType.1525417255" name="LIB" superClass="com.tasking.arm.lkLibInputType"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
<storageModule moduleId="com.tasking.toolInfo">
|
||||
<toolInfo>TASKING program builder v4.4r1 Build 077</toolInfo>
|
||||
</storageModule>
|
||||
<storageModule addStartupFiles="false" moduleId="com.tasking.processor" updateRefProjects="true"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="STM3210B-EVAL.com.tasking.arm.target.abs.491846486" name="TASKING ARM Application" projectType="com.tasking.arm.target.abs"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.release.1258418627;com.tasking.config.arm.abs.release.1258418627.">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.debug.2044455393;com.tasking.config.arm.abs.debug.2044455393.">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping">
|
||||
<project-mappings>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.tasking.arm.clanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.tasking.arm.clanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.tasking.arm.cpplanguage"/>
|
||||
<content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.tasking.arm.cpplanguage"/>
|
||||
</project-mappings>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope" versionNumber="1">
|
||||
<resource resourceType="PROJECT" workspacePath="/STM3210B-EVAL"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
</cproject>
|
|
@ -0,0 +1,162 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>STM32F0XX_MD(STM32F0x1xx)</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>com.tasking.arm.TskManagedBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>com.tasking.arm.target</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>CMSIS</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>CMSIS/startup_stm32f0xx.s</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f0xx.s</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>CMSIS/system_stm32f0xx.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/system_stm32f0xx.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_adc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_adc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_cec.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_cec.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_comp.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_comp.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_crc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_crc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dac.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dac.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dbgmcu.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dbgmcu.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_dma.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_dma.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_exti.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_exti.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_flash.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_flash.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_gpio.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_gpio.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_i2c.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_i2c.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_iwdg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_iwdg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_misc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_misc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_pwr.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_pwr.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_rcc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rcc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_rtc.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_rtc.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_spi.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_spi.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_syscfg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_syscfg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_tim.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_tim.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_usart.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_usart.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>StdPeriph_Driver/stm32f0xx_wwdg.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F0xx_StdPeriph_Driver/src/stm32f0xx_wwdg.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/main.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/main.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>User/stm32f0xx_it.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/stm32f0xx_it.c</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
|
@ -0,0 +1,45 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.tasking.cdt.launch.localCLaunch">
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.ATTR_RUN_IN_SEPARATE_PROCESS" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (SWD)"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/>
|
||||
<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM320518-EVAL"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/>
|
||||
<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/>
|
||||
<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f051xx.sre"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/>
|
||||
<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="SWD"/>
|
||||
<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/>
|
||||
<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${build_config}\STM32F0XX_MD(STM32F0x1xx).abs"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32F0XX_MD(STM32F0x1xx)"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/STM32F0XX_MD(STM32F0x1xx)"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="false"/>
|
||||
</launchConfiguration>
|
|
@ -0,0 +1,162 @@
|
|||
///////////////////////////////////////////////////////////////////////////
|
||||
//
|
||||
// File : stm32f0xx.lsl
|
||||
//
|
||||
// Version : @(#)stm32f0xx.lsl 1.5 11/06/30
|
||||
//
|
||||
// Description : LSL file for the STMicroelectronics STM32F0xx
|
||||
//
|
||||
// Copyright 2010-2011 Altium BV
|
||||
//
|
||||
// Macros specific to control this LSL file
|
||||
//
|
||||
// __MEMORY Define this macro to suppress definition of on-chip
|
||||
// memory. Must be defined when you want to define on-chip
|
||||
// in your project's LSL file.
|
||||
// __FLASH_SIZE Specifies the size of flash memory to be allocated
|
||||
// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated
|
||||
// __EEPROM_SIZE Specifies the size of the EEPROM memory to be allocated
|
||||
// __NO_DEFAULT_AUTO_VECTORS
|
||||
// When enabled the interrupt vector table will not be
|
||||
// generated
|
||||
// __VECTOR_TABLE_RAM_COPY
|
||||
// Define this macro to enable copying the vector table
|
||||
// at startup from ROM to RAM.
|
||||
// __VECTOR_TABLE_ROM_ADDR
|
||||
// Specify the vector table address in ROM
|
||||
// __VECTOR_TABLE_RAM_ADDR
|
||||
// Specify the vector table address in RAM when the the
|
||||
// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY)
|
||||
//
|
||||
// See arm_arch.lsl for more available macros.
|
||||
//
|
||||
// Notes:
|
||||
// In the STM32F0xx, 3 different boot modes can be selected
|
||||
// - User Flash memory is selected as boot space
|
||||
// - SystemMemory is selected as boot space
|
||||
// - Embedded SRAM is selected as boot space
|
||||
//
|
||||
// This aliases the physical memory associated with each boot mode to Block
|
||||
// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
|
||||
// the related memory (Flash memory or SRAM) is still accessible at its
|
||||
// original memory space.
|
||||
//
|
||||
////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
#ifndef __NO_DEFAULT_AUTO_VECTORS
|
||||
// Suppress the vectors as defined arm_arch.lsl, because we define our
|
||||
// own vectors for CMIS
|
||||
#define __CMSIS_VECTORS 1
|
||||
#define __NO_DEFAULT_AUTO_VECTORS 1
|
||||
#define __NR_OF_VECTORS 47
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_ROM_ADDR
|
||||
# define __VECTOR_TABLE_ROM_ADDR 0x08000000
|
||||
#endif
|
||||
|
||||
#ifndef __VECTOR_TABLE_RAM_ADDR
|
||||
# define __VECTOR_TABLE_RAM_ADDR 0x00000000
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __STACK
|
||||
# define __STACK 4k
|
||||
#endif
|
||||
|
||||
#ifndef __HEAP
|
||||
# define __HEAP 2k
|
||||
#endif
|
||||
|
||||
#include <arm_arch.lsl>
|
||||
|
||||
//
|
||||
// If no memory is defined yet use the following memory settings
|
||||
//
|
||||
#ifndef __MEMORY
|
||||
|
||||
// Specify default size for Flash and SRAM
|
||||
#ifndef __FLASH_SIZE
|
||||
# define __FLASH_SIZE 64k
|
||||
#endif
|
||||
#ifndef __SRAM_SIZE
|
||||
# define __SRAM_SIZE 8k
|
||||
#endif
|
||||
|
||||
memory STM32F0xx_Flash
|
||||
{
|
||||
mau = 8;
|
||||
type = rom;
|
||||
size = __FLASH_SIZE;
|
||||
map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus);
|
||||
}
|
||||
|
||||
memory STM32F0xx_SRAM
|
||||
{
|
||||
mau = 8;
|
||||
type = ram;
|
||||
size = __SRAM_SIZE;
|
||||
map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus);
|
||||
}
|
||||
|
||||
#endif /* __MEMORY */
|
||||
|
||||
|
||||
//
|
||||
// Custom vector table defines interrupts according to CMSIS standard
|
||||
//
|
||||
# if defined(__CPU_ARMV6M__)
|
||||
section_setup ::linear
|
||||
{
|
||||
// vector table with handler addresses
|
||||
vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR,
|
||||
template = ".text.handler_address",
|
||||
template_symbol = "_lc_vector_handler",
|
||||
vector_prefix = "_vector_",
|
||||
__VECTOR_TABLE_COPY_ATTRIBUTE
|
||||
fill = loop,
|
||||
no_inline
|
||||
)
|
||||
{
|
||||
vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack
|
||||
vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler
|
||||
vector ( id = 2, optional, fill = "NMI_Handler" );
|
||||
vector ( id = 3, optional, fill = "HardFault_Handler" );
|
||||
vector ( id = 11, optional, fill = "SVC_Handler" );
|
||||
vector ( id = 14, optional, fill = "PendSV_Handler" );
|
||||
vector ( id = 15, optional, fill = "SysTick_Handler" );
|
||||
|
||||
// External Interrupts :
|
||||
vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog
|
||||
vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect
|
||||
vector ( id = 18, optional, fill = "RTC_IRQHandler" ); // RTC
|
||||
vector ( id = 19, optional, fill = "FLASH_IRQHandler" ); // Flash
|
||||
vector ( id = 20, optional, fill = "RCC_IRQHandler" ); // RCC
|
||||
vector ( id = 21, optional, fill = "EXTI0_1_IRQHandler" ); // EXTI Line 0 and 1
|
||||
vector ( id = 22, optional, fill = "EXTI2_3_IRQHandler" ); // EXTI Line 2 and 3
|
||||
vector ( id = 23, optional, fill = "EXTI4_15_IRQHandler" ); // EXTI Line 4 to 15
|
||||
vector ( id = 24, optional, fill = "TS_IRQHandler" ); // TS
|
||||
vector ( id = 25, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1
|
||||
vector ( id = 26, optional, fill = "DMA1_Channel2_3_IRQHandler" ); // DMA1 Channel 2 and Channel 3
|
||||
vector ( id = 27, optional, fill = "DMA1_Channel4_5_IRQHandler" ); // DMA1 Channel 4 and Channel 5
|
||||
vector ( id = 28, optional, fill = "ADC1_COMP_IRQHandler" ); // ADC1, COMP1 and COMP2
|
||||
vector ( id = 29, optional, fill = "TIM1_BRK_UP_TRG_COM_IRQHandler" ); // TIM1 Break, Update, Trigger and Commutation
|
||||
vector ( id = 30, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare
|
||||
vector ( id = 31, optional, fill = "TIM2_IRQHandler" ); // TIM2
|
||||
vector ( id = 32, optional, fill = "TIM3_IRQHandler" ); // TIM3
|
||||
vector ( id = 33, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6 and DAC
|
||||
vector ( id = 35, optional, fill = "TIM14_IRQHandler" ); // TIM14
|
||||
vector ( id = 36, optional, fill = "TIM15_IRQHandler" ); // TIM15
|
||||
vector ( id = 37, optional, fill = "TIM16_IRQHandler" ); // TIM16
|
||||
vector ( id = 38, optional, fill = "TIM17_IRQHandler" ); // TIM17
|
||||
vector ( id = 39, optional, fill = "I2C1_IRQHandler" ); // I2C1
|
||||
vector ( id = 40, optional, fill = "I2C2_IRQHandler" ); // I2C2
|
||||
vector ( id = 41, optional, fill = "SPI1_IRQHandler" ); // SPI1
|
||||
vector ( id = 42, optional, fill = "SPI2_IRQHandler" ); // SPI2
|
||||
vector ( id = 43, optional, fill = "USART1_IRQHandler" ); // USART1
|
||||
vector ( id = 44, optional, fill = "USART2_IRQHandler" ); // USART2
|
||||
vector ( id = 46, optional, fill = "CEC_IRQHandler" ); // CEC
|
||||
|
||||
}
|
||||
}
|
||||
# endif
|
|
@ -0,0 +1,61 @@
|
|||
/**
|
||||
@page TASKING_STM320518 TASKING Project Template for STM32F0xx Medium Density devices
|
||||
|
||||
@verbatim
|
||||
******************* (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
* @file readme.txt
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 31-July-2013
|
||||
* @brief This sub-directory contains all the user-modifiable files needed
|
||||
* to create a new project linked with the STM32F0xx Standard Peripheral
|
||||
* Library and working with TASKING VX-toolset for ARM Cortex-M.
|
||||
******************************************************************************
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
@endverbatim
|
||||
|
||||
@par Directory contents
|
||||
|
||||
- .cproject/.project: A pre-configured project file with the provided library
|
||||
structure that produces an executable image with TASKING.
|
||||
|
||||
- TASKING : This folder contains
|
||||
|
||||
- stm32f0xx.lsl : This file is TASKING linker script that contains the
|
||||
STM32F0xx vector table and used to place program code (readonly)
|
||||
in internal FLASH and data (readwrite, Stack and Heap)in
|
||||
internal SRAM.
|
||||
You can customize this file to your need.
|
||||
|
||||
@par How to use it ?
|
||||
|
||||
- Open TASKING toolchain.
|
||||
- Click on File->Import, select General->'Existing Projects into Workspace'
|
||||
and then click "Next".
|
||||
- Browse to TASKING workspace directory and select the project:
|
||||
- STM32F0XX_MD(STM32F0x1xx): to configure the project for STM32F0xx Medium Density devices.
|
||||
- Rebuild all project files: Select the project in the "Project explorer"
|
||||
window then click on Project->build project menu.
|
||||
- Run program: Select the project in the "Project explorer" window then click
|
||||
Run->Debug (F11)
|
||||
|
||||
@note The needed define symbols for this config are already declared in the
|
||||
preprocessor section: USE_STM320518_EVAL, STM32F0XX_MD, USE_STDPERIPH_DRIVER ,USE_DEFAULT_TIMEOUT_CALLBACK
|
||||
|
||||
|
||||
|
||||
* <h3><center>© COPYRIGHT STMicroelectronics</center></h3>
|
||||
*/
|
|
@ -0,0 +1,290 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f030.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F030 devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word 0
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_1_IRQHandler
|
||||
.word EXTI2_3_IRQHandler
|
||||
.word EXTI4_15_IRQHandler
|
||||
.word 0
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_3_IRQHandler
|
||||
.word DMA1_Channel4_5_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word 0
|
||||
.word TIM3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM14_IRQHandler
|
||||
.word TIM15_IRQHandler
|
||||
.word TIM16_IRQHandler
|
||||
.word TIM17_IRQHandler
|
||||
.word I2C1_IRQHandler
|
||||
.word I2C2_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F0xx devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_5_IRQHandler
|
||||
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_IRQHandler
|
||||
.thumb_set I2C2_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32f0xx.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @brief STM32F0xx Devices vector table for Atollic toolchain.
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F0xx Medium-density devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
|
@ -17,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -0,0 +1,285 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f0xx_ld.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F0xx Low-density devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_1_IRQHandler
|
||||
.word EXTI2_3_IRQHandler
|
||||
.word EXTI4_15_IRQHandler
|
||||
.word 0
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_3_IRQHandler
|
||||
.word DMA1_Channel4_5_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM14_IRQHandler
|
||||
.word 0
|
||||
.word TIM16_IRQHandler
|
||||
.word TIM17_IRQHandler
|
||||
.word I2C1_IRQHandler
|
||||
.word 0
|
||||
.word SPI1_IRQHandler
|
||||
.word 0
|
||||
.word USART1_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F0xx devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_5_IRQHandler
|
||||
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,244 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f030.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F030 devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM0 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; @attention
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD 0 ; Reserved
|
||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM14_IRQHandler ; TIM14
|
||||
DCD TIM15_IRQHandler ; TIM15
|
||||
DCD TIM16_IRQHandler ; TIM16
|
||||
DCD TIM17_IRQHandler ; TIM17
|
||||
DCD I2C1_IRQHandler ; I2C1
|
||||
DCD I2C2_IRQHandler ; I2C2
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler routine
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT I2C2_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_1_IRQHandler
|
||||
EXTI2_3_IRQHandler
|
||||
EXTI4_15_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
DMA1_Channel4_5_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM14_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
I2C2_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -1,13 +1,14 @@
|
|||
;******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
|
||||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f0xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.0.1
|
||||
;* Date : 20-April-2012
|
||||
;* Description : STM32F0xx Devices vector table for MDK-ARM toolchain.
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F0xx Medium-density devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM0 processor is in Thread mode,
|
||||
|
|
|
@ -0,0 +1,239 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f0xx_ld.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F0xx Low-density devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM0 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
; @attention
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM14_IRQHandler ; TIM14
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM16_IRQHandler ; TIM16
|
||||
DCD TIM17_IRQHandler ; TIM17
|
||||
DCD I2C1_IRQHandler ; I2C1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD 0 ; Reserved
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler routine
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT RTC_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_15_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT I2C1_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
RTC_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_1_IRQHandler
|
||||
EXTI2_3_IRQHandler
|
||||
EXTI4_15_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
DMA1_Channel4_5_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM14_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
I2C1_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
USART1_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -0,0 +1,289 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f030.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F030 devices vector table for RIDE7 toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word 0
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_1_IRQHandler
|
||||
.word EXTI2_3_IRQHandler
|
||||
.word EXTI4_15_IRQHandler
|
||||
.word 0
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_3_IRQHandler
|
||||
.word DMA1_Channel4_5_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word 0
|
||||
.word TIM3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM14_IRQHandler
|
||||
.word TIM15_IRQHandler
|
||||
.word TIM16_IRQHandler
|
||||
.word TIM17_IRQHandler
|
||||
.word I2C1_IRQHandler
|
||||
.word I2C2_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F0xx devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_5_IRQHandler
|
||||
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_IRQHandler
|
||||
.thumb_set I2C2_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -2,13 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32f0xx.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @brief STM32F0xx Devices vector table for RIDE7 toolchain.
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F0xx Medium-density devices vector table for RIDE7 toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
|
@ -16,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -32,7 +33,7 @@
|
|||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
|
@ -41,10 +42,10 @@
|
|||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
|
@ -58,17 +59,19 @@ defined in linker script */
|
|||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
|
@ -77,7 +80,7 @@ CopyDataInit:
|
|||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
|
@ -86,47 +89,51 @@ LoopCopyDataInit:
|
|||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
// XXX fix a bug.
|
||||
str r3, [r2]
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
// XXX original code:
|
||||
// str r3, [r2], #4
|
||||
// XXX Done
|
||||
|
||||
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
bl SystemInit
|
||||
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/*******************************************************************************
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
@ -166,7 +173,7 @@ g_pfnVectors:
|
|||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM6_DAC_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM14_IRQHandler
|
||||
.word TIM15_IRQHandler
|
||||
.word TIM16_IRQHandler
|
||||
|
@ -182,15 +189,15 @@ g_pfnVectors:
|
|||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F0xx devices. */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
|
@ -291,7 +298,7 @@ g_pfnVectors:
|
|||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
|
@ -0,0 +1,284 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f0xx_ld.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief STM32F0xx Low-density devices vector table for RIDE7 toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the system clock
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M0. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_1_IRQHandler
|
||||
.word EXTI2_3_IRQHandler
|
||||
.word EXTI4_15_IRQHandler
|
||||
.word 0
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_3_IRQHandler
|
||||
.word DMA1_Channel4_5_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word TIM14_IRQHandler
|
||||
.word 0
|
||||
.word TIM16_IRQHandler
|
||||
.word TIM17_IRQHandler
|
||||
.word I2C1_IRQHandler
|
||||
.word 0
|
||||
.word SPI1_IRQHandler
|
||||
.word 0
|
||||
.word USART1_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F0xx devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_5_IRQHandler
|
||||
.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM14_IRQHandler
|
||||
.thumb_set TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,300 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f030.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F030 devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;*******************************************************************************
|
||||
; @attention
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD 0 ; Reserved
|
||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM14_IRQHandler ; TIM14
|
||||
DCD TIM15_IRQHandler ; TIM15
|
||||
DCD TIM16_IRQHandler ; TIM16
|
||||
DCD TIM17_IRQHandler ; TIM17
|
||||
DCD I2C1_IRQHandler ; I2C1
|
||||
DCD I2C2_IRQHandler ; I2C2
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_IRQHandler
|
||||
B RTC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_1_IRQHandler
|
||||
B EXTI0_1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_3_IRQHandler
|
||||
B EXTI2_3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_15_IRQHandler
|
||||
B EXTI4_15_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
B DMA1_Channel2_3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel4_5_IRQHandler
|
||||
B DMA1_Channel4_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
B TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM14_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM14_IRQHandler
|
||||
B TIM14_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM15_IRQHandler
|
||||
B TIM15_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM16_IRQHandler
|
||||
B TIM16_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM17_IRQHandler
|
||||
B TIM17_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_IRQHandler
|
||||
B I2C1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_IRQHandler
|
||||
B I2C2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
END
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -1,14 +1,17 @@
|
|||
;******************** (C) COPYRIGHT 2012 STMicroelectronics ********************
|
||||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f0xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.0.1
|
||||
;* Date : 20-April-2012
|
||||
;* Description : STM32F0xx Devices vector table for EWARM toolchain.
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F0xx Medium-density devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;*******************************************************************************
|
||||
|
|
|
@ -0,0 +1,288 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f0xx_ld.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.1
|
||||
;* Date : 22-November-2013
|
||||
;* Description : STM32F0xx Low-density devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address
|
||||
;* - Configure the system clock
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M0 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;*******************************************************************************
|
||||
; @attention
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD RTC_IRQHandler ; RTC through EXTI Line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
|
||||
DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
|
||||
DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
|
||||
DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM14_IRQHandler ; TIM14
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM16_IRQHandler ; TIM16
|
||||
DCD TIM17_IRQHandler ; TIM17
|
||||
DCD I2C1_IRQHandler ; I2C1
|
||||
DCD 0 ; Reserved
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD 0 ; Reserved
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_IRQHandler
|
||||
B RTC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_1_IRQHandler
|
||||
B EXTI0_1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_3_IRQHandler
|
||||
B EXTI2_3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_15_IRQHandler
|
||||
B EXTI4_15_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel2_3_IRQHandler
|
||||
B DMA1_Channel2_3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Channel4_5_IRQHandler
|
||||
B DMA1_Channel4_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
B TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM14_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM14_IRQHandler
|
||||
B TIM14_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM16_IRQHandler
|
||||
B TIM16_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM17_IRQHandler
|
||||
B TIM17_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_IRQHandler
|
||||
B I2C1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
END
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f0xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
|
||||
* This file contains the system clock configuration for STM32F0xx devices,
|
||||
* and is generated by the clock configuration tool
|
||||
|
@ -67,7 +67,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -161,8 +161,13 @@ void SystemInit (void)
|
|||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
|
||||
#if defined (STM32F0XX_MD)
|
||||
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0xF8FFB80C;
|
||||
#else
|
||||
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */
|
||||
RCC->CFGR &= (uint32_t)0x08FFB80C;
|
||||
#endif /* STM32F0XX_MD */
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
@ -6,6 +6,8 @@
|
|||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<link rel="File-List" href="Release_Notes%20%28package%29_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Release_Notes%20%28package%29_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32F0xx Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>tguilhot</o:LastAuthor> <o:Revision>145</o:Revision> <o:TotalTime>461</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2010-12-13T14:14:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>358</o:Words> <o:Characters>2045</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>17</o:Lines> <o:Paragraphs>4</o:Paragraphs> <o:CharactersWithSpaces>2399</o:CharactersWithSpaces> <o:Version>11.9999</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:View>Normal</w:View> <w:SpellingState>Clean</w:SpellingState> <w:GrammarState>Clean</w:GrammarState> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:Compatibility> <w:UseFELayout/> </w:Compatibility> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
@ -275,7 +277,7 @@ ul
|
|||
Notes for<o:p></o:p> </span><span style="font-size: 20pt; color: rgb(51, 102, 255); font-family: Verdana;">STM32F0xx Standard Peripherals Library Drivers</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span><br>
|
||||
<span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
|
||||
© 2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
© 2013 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt;"><img style="border: 0px solid ; width: 86px; height: 65px;" alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp"></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
|
@ -291,7 +293,85 @@ Notes for<o:p></o:p> </span><span style="font-size: 20pt; color: rgb(51, 102, 25
|
|||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32F0xx Standard Peripherals Library Drivers update history</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F0xx Standard Peripherals Library Drivers update history</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F0xx Standard Peripherals Library Drivers update history</span></h2><br><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.1 / 22-November-2013<br>
|
||||
</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update the support of <span style="font-style: italic;">STM32F030</span> devices by removing the references to<span style="font-style: italic;"> STM32F030x8 and STM32F030x6 devices </span>and replacing them in by STM32F030 in the SYCFG and GPIO drivers </span><span style="font-size: 10pt; font-family: Verdana;"><br>
|
||||
</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 01-Agust-2013<br>
|
||||
</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support of <span style="font-weight: bold; font-style: italic;">STM32F030x8 and STM32F030x6 devices</span> (</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F030</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices are </span><span style="font-size: 10pt; font-family: Verdana;"> microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)<br>
|
||||
</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1 / 31-July-2013<br>
|
||||
</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_tim.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">TIM_OC2Init()</span>: add configuration of OC2 output idle state for TIM15<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 10-May-2013<br>
|
||||
</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support of <span style="font-weight: bold; font-style: italic;">STM32F0xx Low-density devices</span> (</span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F0XX_LD</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices, </span><span style="font-size: 10pt; font-family: Verdana;">STM32F050xx and STM32F060xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) and miscellaneous update<br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_rcc.c/.h: update for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F0XX_LD</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new function <span style="font-style: italic;">RCC_MCOConfig(uint8_t RCC_MCOSource,
|
||||
uint32_t RCC_MCOPrescaler)</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_DeInit()</span>: </span><span style="font-size: 10pt; font-family: Verdana;"> update to reset new bits added in </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RCC_CFGR</span></span><span style="font-size: 10pt; font-family: Verdana;"> register</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_syscfg.c/.h: </span><span style="font-size: 10pt; font-family: Verdana;">update for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F0XX_LD</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add defines for "I2C fast mode plus" new AF mapping: <span style="font-style: italic;">SYSCFG_I2CFastModePlus_PA9</span>, <span style="font-style: italic;">SYSCFG_I2CFastModePlus_PA10</span> and SYSCFG_I2CFastModePlus_I2C1</span><br>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_gpio.h: </span><span style="font-size: 10pt; font-family: Verdana;">update for </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">STM32F0XX_LD</span></span><span style="font-size: 10pt; font-family: Verdana;"> devices</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">GPIO_PinAFConfig(): in the </span><span style="font-size: 10pt; font-family: Verdana;">function header add reference to I2C1's new AF4 remapping</span><br>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_flash.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Swap the value of these defines <span style="font-style: italic;">OB_VDDA_ANALOG_ON</span> and <span style="font-style: italic;">OB_VDDA_ANALOG_OFF</span></span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_misc.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">NVIC_Init()</span>: remove reference to <span style="font-style: italic;">NVIC_PriorityGroupConfig()</span> function (not available)<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_gpio.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">GPIOSpeed_TypeDef</span> members naming to be in line w/ the Reference Manual <br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_exti.c<br>
|
||||
</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">EXTI_GetITStatus() updated to remove test on IMR register to avoid corner case limitation</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.2 / 13-July-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_i2c.c/.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">I2C_SoftwareResetCmd():</span> update function coding to be in line with </span><span style="font-size: 10pt; font-family: Verdana;">I2C software reset </span><span style="font-size: 10pt; font-family: Verdana;">procedure recommended in STM32F0xx lasted documentation. As consequence <span style="font-style: italic;">NewState</span> parameter was removed.<br></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_flash.c/.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename <span style="font-style: italic;">FLASH_ProgramOptionByteData()</span> to <span style="font-style: italic;">FLASH_OB_ProgramData()</span></span></li></ul><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add some legacy defines for compatibility with STM32F10x Flash driver</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_rtc.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">RTC_DeInit(): </span>remove unused variable <span style="font-style: italic;">“wutcounter”</span></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_spi.c </span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">File header's comment: </span><span style="font-size: 10pt; font-family: Verdana;">add details how to configure the FIFO threshold </span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.1 / 20-April-2012</span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All drivers, function's header: update </span><span style="font-size: 10pt; font-family: Verdana;">comments </span><span style="font-size: 10pt; font-family: Verdana;">and Doxygen tags </span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">formatting</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32f0xx_pwr.c</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">PWR_PVDLevelConfig()</span>
|
||||
function: remove value of the voltage threshold corresponding to each
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the ADC firmware
|
||||
* library
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_cec.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the CEC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_comp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the COMP firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_crc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the CRC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dac.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the DAC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dbgmcu.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the DBGMCU firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dma.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the DMA firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_exti.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the EXTI
|
||||
* firmware library
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_flash.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the FLASH
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -208,8 +208,8 @@ typedef enum
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define OB_VDDA_ANALOG_ON ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source ON */
|
||||
#define OB_VDDA_ANALOG_OFF ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source OFF */
|
||||
#define OB_VDDA_ANALOG_ON ((uint8_t)0x20) /*!< Analog monitoring on VDDA Power source ON */
|
||||
#define OB_VDDA_ANALOG_OFF ((uint8_t)0x00) /*!< Analog monitoring on VDDA Power source OFF */
|
||||
|
||||
#define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF))
|
||||
|
||||
|
@ -256,6 +256,31 @@ typedef enum
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Legacy
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_WRProt_Pages0to3 OB_WRP_Pages0to3
|
||||
#define FLASH_WRProt_Pages4to7 OB_WRP_Pages4to7
|
||||
#define FLASH_WRProt_Pages8to11 OB_WRP_Pages8to11
|
||||
#define FLASH_WRProt_Pages12to15 OB_WRP_Pages12to15
|
||||
#define FLASH_WRProt_Pages16to19 OB_WRP_Pages16to19
|
||||
#define FLASH_WRProt_Pages20to23 OB_WRP_Pages20to23
|
||||
#define FLASH_WRProt_Pages24to27 OB_WRP_Pages24to27
|
||||
#define FLASH_WRProt_Pages28to31 OB_WRP_Pages28to31
|
||||
#define FLASH_WRProt_Pages32to35 OB_WRP_Pages32to35
|
||||
#define FLASH_WRProt_Pages36to39 OB_WRP_Pages36to39
|
||||
#define FLASH_WRProt_Pages40to43 OB_WRP_Pages40to21
|
||||
#define FLASH_WRProt_Pages44to47 OB_WRP_Pages44to23
|
||||
#define FLASH_WRProt_Pages48to51 OB_WRP_Pages48to51
|
||||
#define FLASH_WRProt_Pages52to55 OB_WRP_Pages52to55
|
||||
#define FLASH_WRProt_Pages56to59 OB_WRP_Pages56to59
|
||||
#define FLASH_WRProt_Pages60to63 OB_WRP_Pages60to63
|
||||
|
||||
|
||||
#define FLASH_WRProt_AllPages OB_WRP_AllPages
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -291,7 +316,7 @@ FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1);
|
|||
FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG);
|
||||
FLASH_Status FLASH_OB_SRAMParityConfig(uint8_t OB_SRAM_Parity);
|
||||
FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER);
|
||||
FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
|
||||
FLASH_Status FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
|
||||
uint8_t FLASH_OB_GetUser(void);
|
||||
uint32_t FLASH_OB_GetWRP(void);
|
||||
FlagStatus FLASH_OB_GetRDP(void);
|
||||
|
@ -303,6 +328,19 @@ void FLASH_ClearFlag(uint32_t FLASH_FLAG);
|
|||
FLASH_Status FLASH_GetStatus(void);
|
||||
FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout);
|
||||
|
||||
/** @defgroup FLASH_Legacy
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_EraseOptionBytes FLASH_OB_Erase
|
||||
#define FLASH_EnableWriteProtection FLASH_OB_EnableWRP
|
||||
#define FLASH_UserOptionByteConfig FLASH_OB_UserConfig
|
||||
#define FLASH_ProgramOptionByteData FLASH_OB_ProgramData
|
||||
#define FLASH_GetUserOptionByte FLASH_OB_GetUser
|
||||
#define FLASH_GetWriteProtectionOptionByte FLASH_OB_GetWRP
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -92,9 +92,9 @@ typedef enum
|
|||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Speed_Level_1 = 0x01, /*!< Medium Speed */
|
||||
GPIO_Speed_Level_2 = 0x02, /*!< Fast Speed */
|
||||
GPIO_Speed_Level_3 = 0x03 /*!< High Speed */
|
||||
GPIO_Speed_Level_1 = 0x00, /*!< I/O output speed: Low 2 MHz */
|
||||
GPIO_Speed_Level_2 = 0x01, /*!< I/O output speed: Medium 10 MHz */
|
||||
GPIO_Speed_Level_3 = 0x03 /*!< I/O output speed: High 50 MHz */
|
||||
}GPIOSpeed_TypeDef;
|
||||
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_Level_1) || ((SPEED) == GPIO_Speed_Level_2) || \
|
||||
|
@ -252,12 +252,12 @@ typedef struct
|
|||
* @brief AF 0 selection
|
||||
*/
|
||||
#define GPIO_AF_0 ((uint8_t)0x00) /* WKUP, EVENTOUT, TIM15, SPI1, TIM17,
|
||||
MCO, SWDAT, SWCLK, TIM14, BOOT,
|
||||
USART1, CEC, IR_OUT, SPI2 */
|
||||
MCO, SWDAT, SWCLK, TIM14, USART1,
|
||||
CEC, IR_OUT, SPI2 */
|
||||
/**
|
||||
* @brief AF 1 selection
|
||||
*/
|
||||
#define GPIO_AF_1 ((uint8_t)0x01) /* USART2, CEC, Tim3, USART1, USART2,
|
||||
#define GPIO_AF_1 ((uint8_t)0x01) /* USART2, CEC, TIM3, USART1, IR_OUT,
|
||||
EVENTOUT, I2C1, I2C2, TIM15 */
|
||||
/**
|
||||
* @brief AF 2 selection
|
||||
|
@ -271,7 +271,7 @@ typedef struct
|
|||
/**
|
||||
* @brief AF 4 selection
|
||||
*/
|
||||
#define GPIO_AF_4 ((uint8_t)0x04) /* TIM14 */
|
||||
#define GPIO_AF_4 ((uint8_t)0x04) /* TIM14, I2C1 (only for STM32F0XX_LD and STM32F030 devices) */
|
||||
/**
|
||||
* @brief AF 5 selection
|
||||
*/
|
||||
|
@ -299,10 +299,10 @@ typedef struct
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define GPIO_Speed_10MHz GPIO_Speed_Level_1 /*!< Fast Speed:10MHz */
|
||||
#define GPIO_Speed_2MHz GPIO_Speed_Level_2 /*!< Medium Speed:2MHz */
|
||||
#define GPIO_Speed_50MHz GPIO_Speed_Level_3 /*!< High Speed:50MHz */
|
||||
|
||||
#define GPIO_Speed_2MHz GPIO_Speed_Level_1 /*!< I/O output speed: Low 2 MHz */
|
||||
#define GPIO_Speed_10MHz GPIO_Speed_Level_2 /*!< I/O output speed: Medium 10 MHz */
|
||||
#define GPIO_Speed_50MHz GPIO_Speed_Level_3 /*!< I/O output speed: High 50 MHz */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the I2C firmware
|
||||
* library
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -409,7 +409,7 @@ void I2C_DeInit(I2C_TypeDef* I2Cx);
|
|||
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
|
||||
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx);
|
||||
void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState);
|
||||
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_StopModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the IWDG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_misc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the miscellaneous
|
||||
* firmware library functions (add-on to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the PWR firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the RCC
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -407,14 +407,51 @@ typedef struct
|
|||
#define RCC_MCOSource_HSE ((uint8_t)0x06)
|
||||
#define RCC_MCOSource_PLLCLK_Div2 ((uint8_t)0x07)
|
||||
|
||||
#define IS_RCC_MCO_SOURCE(SOURCE) (((SOURCE) == RCC_MCOSource_NoClock) || ((SOURCE) == RCC_MCOSource_HSI14) || \
|
||||
((SOURCE) == RCC_MCOSource_SYSCLK) || ((SOURCE) == RCC_MCOSource_HSI) || \
|
||||
((SOURCE) == RCC_MCOSource_HSE) || ((SOURCE) == RCC_MCOSource_PLLCLK_Div2)|| \
|
||||
((SOURCE) == RCC_MCOSource_LSI) || ((SOURCE) == RCC_MCOSource_LSE))
|
||||
#if defined (STM32F0XX_MD)
|
||||
#define IS_RCC_MCO_SOURCE(SOURCE) (((SOURCE) == RCC_MCOSource_NoClock) || ((SOURCE) == RCC_MCOSource_HSI14) || \
|
||||
((SOURCE) == RCC_MCOSource_SYSCLK) || ((SOURCE) == RCC_MCOSource_HSI) || \
|
||||
((SOURCE) == RCC_MCOSource_HSE) || ((SOURCE) == RCC_MCOSource_PLLCLK_Div2)|| \
|
||||
((SOURCE) == RCC_MCOSource_LSI) || ((SOURCE) == RCC_MCOSource_LSE))
|
||||
#else
|
||||
#define RCC_MCOSource_PLLCLK ((uint8_t)0x87)
|
||||
|
||||
#define IS_RCC_MCO_SOURCE(SOURCE) (((SOURCE) == RCC_MCOSource_NoClock) || ((SOURCE) == RCC_MCOSource_HSI14) || \
|
||||
((SOURCE) == RCC_MCOSource_SYSCLK) || ((SOURCE) == RCC_MCOSource_HSI) || \
|
||||
((SOURCE) == RCC_MCOSource_HSE) || ((SOURCE) == RCC_MCOSource_PLLCLK_Div2)|| \
|
||||
((SOURCE) == RCC_MCOSource_LSI) || ((SOURCE) == RCC_MCOSource_LSE) || \
|
||||
((SOURCE) == RCC_MCOSource_PLLCLK))
|
||||
#endif /* STM32F0XX_MD */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_MCOPrescaler
|
||||
* @{
|
||||
*/
|
||||
#if !defined (STM32F0XX_MD)
|
||||
#define RCC_MCOPrescaler_1 RCC_CFGR_MCO_PRE_1
|
||||
#define RCC_MCOPrescaler_2 RCC_CFGR_MCO_PRE_2
|
||||
#define RCC_MCOPrescaler_4 RCC_CFGR_MCO_PRE_4
|
||||
#define RCC_MCOPrescaler_8 RCC_CFGR_MCO_PRE_8
|
||||
#define RCC_MCOPrescaler_16 RCC_CFGR_MCO_PRE_16
|
||||
#define RCC_MCOPrescaler_32 RCC_CFGR_MCO_PRE_32
|
||||
#define RCC_MCOPrescaler_64 RCC_CFGR_MCO_PRE_64
|
||||
#define RCC_MCOPrescaler_128 RCC_CFGR_MCO_PRE_128
|
||||
|
||||
#define IS_RCC_MCO_PRESCALER(PRESCALER) (((PRESCALER) == RCC_MCOPrescaler_1) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_2) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_4) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_8) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_16) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_32) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_64) || \
|
||||
((PRESCALER) == RCC_MCOPrescaler_128))
|
||||
#endif /* STM32F0XX_MD */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup RCC_Flag
|
||||
* @{
|
||||
*/
|
||||
|
@ -473,7 +510,11 @@ void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
|
|||
void RCC_PLLCmd(FunctionalState NewState);
|
||||
void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Div);
|
||||
void RCC_ClockSecuritySystemCmd(FunctionalState NewState);
|
||||
#if defined (STM32F0XX_MD)
|
||||
void RCC_MCOConfig(uint8_t RCC_MCOSource);
|
||||
#else
|
||||
void RCC_MCOConfig(uint8_t RCC_MCOSource,uint32_t RCC_MCOPrescaler);
|
||||
#endif /* STM32F0XX_MD */
|
||||
|
||||
/* System, AHB and APB busses clocks configuration functions ******************/
|
||||
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_rtc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the RTC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the SPI
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_syscfg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the SYSCFG firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -151,11 +151,17 @@
|
|||
#define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */
|
||||
#define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */
|
||||
#define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */
|
||||
#define SYSCFG_I2CFastModePlus_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9 (only for STM32F0XX_LD and STM32F030 devices) */
|
||||
#define SYSCFG_I2CFastModePlus_PA10 SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10(only for STM32F0XX_LD and STM32F030 devices) */
|
||||
#define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1/* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0XX_LD and STM32F030 devices) */
|
||||
|
||||
#define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB9))
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PB9) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PA9) || \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_PA10)|| \
|
||||
((PIN) == SYSCFG_I2CFastModePlus_I2C1))
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_tim.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the TIM
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_wwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file contains all the functions prototypes for the WWDG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_adc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_cec.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Consumer Electronics Control (CEC) peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -71,7 +71,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_comp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the comparators (COMP1 and COMP2) peripheral:
|
||||
* + Comparators configuration
|
||||
|
@ -77,7 +77,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_crc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of CRC computation unit peripheral:
|
||||
* + Configuration of the CRC computation unit
|
||||
|
@ -34,7 +34,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dac.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
|
||||
* + DAC channel configuration: trigger, output buffer, data format
|
||||
|
@ -79,7 +79,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -98,7 +98,6 @@
|
|||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f0xx_dac.h"
|
||||
#include "stm32f0xx_rcc.h"
|
||||
|
||||
/** @addtogroup STM32F0xx_StdPeriph_Driver
|
||||
* @{
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dbgmcu.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Debug MCU (DBGMCU) peripheral:
|
||||
* + Device and Revision ID management
|
||||
|
@ -14,7 +14,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_dma.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Direct Memory Access controller (DMA):
|
||||
* + Initialization and Configuration
|
||||
|
@ -50,7 +50,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_exti.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the EXTI peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -45,7 +45,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -261,13 +261,11 @@ void EXTI_ClearFlag(uint32_t EXTI_Line)
|
|||
*/
|
||||
ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
uint32_t enablestatus = 0;
|
||||
ITStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
|
||||
|
||||
enablestatus = EXTI->IMR & EXTI_Line;
|
||||
if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
|
||||
if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
|
||||
{
|
||||
bitstatus = SET;
|
||||
}
|
||||
|
@ -276,7 +274,7 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
|
|||
bitstatus = RESET;
|
||||
}
|
||||
return bitstatus;
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_flash.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the FLASH peripheral:
|
||||
* - FLASH Interface configuration
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -440,7 +440,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
(+) FLASH_Status FLASH_OB_BOOTConfig(uint8_t OB_BOOT1);
|
||||
(+) FLASH_Status FLASH_OB_VDDAConfig(uint8_t OB_VDDA_ANALOG);
|
||||
(+) FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER);
|
||||
(+) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data);
|
||||
(+) FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
|
||||
(+) uint8_t FLASH_OB_GetUser(void);
|
||||
(+) uint32_t FLASH_OB_GetWRP(void);
|
||||
(+) FlagStatus FLASH_OB_GetRDP(void);
|
||||
|
@ -461,7 +461,7 @@ FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
=> to enable or disable the VDDA Analog Monitoring
|
||||
(++) You can write all User Options bytes at once using a single function
|
||||
by calling FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER)
|
||||
(++) FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) to program the
|
||||
(++) FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) to program the
|
||||
two half word in the option bytes
|
||||
|
||||
(#) Once all needed option bytes to be programmed are correctly written, call the
|
||||
|
@ -919,7 +919,7 @@ FLASH_Status FLASH_OB_WriteUser(uint8_t OB_USER)
|
|||
* @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
|
||||
* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
|
||||
*/
|
||||
FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data)
|
||||
FLASH_Status FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
/* Check the parameters */
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the GPIO peripheral:
|
||||
* + Initialization and Configuration functions
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -453,11 +453,11 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
|||
* @param GPIO_AF: selects the pin to used as Alternate function.
|
||||
* This parameter can be one of the following value:
|
||||
* @arg GPIO_AF_0: WKUP, EVENTOUT, TIM15, SPI1, TIM17,MCO, SWDAT, SWCLK, TIM14,
|
||||
* BOOT,USART1, CEC, IR_OUT, SPI2
|
||||
* @arg GPIO_AF_1: USART2, CEC, Tim3, USART1, USART2,EVENTOUT, I2C1, I2C2, TIM15
|
||||
* USART1, CEC, IR_OUT, SPI2
|
||||
* @arg GPIO_AF_1: USART2, CEC, Tim3, USART1, IR_OUT,EVENTOUT, I2C1, I2C2, TIM15
|
||||
* @arg GPIO_AF_2: TIM2, TIM1, EVENTOUT, TIM16, TIM17
|
||||
* @arg GPIO_AF_3: TS, I2C1, TIM15, EVENTOUT
|
||||
* @arg GPIO_AF_4: TIM14
|
||||
* @arg GPIO_AF_4: TIM14, I2C1 (only for STM32F0XX_LD and STM32F030 devices)
|
||||
* @arg GPIO_AF_5: TIM16, TIM17
|
||||
* @arg GPIO_AF_6: EVENTOUT
|
||||
* @arg GPIO_AF_7: COMP1 OUT, COMP2 OUT
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_i2c.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Inter-Integrated circuit (I2C):
|
||||
* + Initialization and Configuration
|
||||
|
@ -58,7 +58,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -293,28 +293,26 @@ void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified I2C software reset.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param NewState: new state of the I2C software reset.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None
|
||||
*/
|
||||
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
||||
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Peripheral under reset */
|
||||
I2Cx->CR1 |= I2C_CR1_SWRST;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Peripheral not under reset */
|
||||
I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SWRST);
|
||||
}
|
||||
|
||||
/* Disable peripheral */
|
||||
I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
|
||||
|
||||
/* Perform a dummy read to delay the disable of peripheral for minimum
|
||||
3 APB clock cycles to perform the software reset functionality */
|
||||
*(__IO uint32_t *)(uint32_t)I2Cx;
|
||||
|
||||
/* Enable peripheral */
|
||||
I2Cx->CR1 |= I2C_CR1_PE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1506,12 +1504,12 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
|||
|
||||
/* Check if the interrupt source is enabled or not */
|
||||
/* If Error interrupt */
|
||||
if((I2C_IT & ERROR_IT_MASK) != 0)
|
||||
if ((uint32_t)(I2C_IT & ERROR_IT_MASK))
|
||||
{
|
||||
enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1));
|
||||
}
|
||||
/* If TC interrupt */
|
||||
else if((I2C_IT & TC_IT_MASK) != 0)
|
||||
else if ((uint32_t)(I2C_IT & TC_IT_MASK))
|
||||
{
|
||||
enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1));
|
||||
}
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_iwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Independent watchdog (IWDG) peripheral:
|
||||
* + Prescaler and Counter configuration
|
||||
|
@ -77,7 +77,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_misc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides all the miscellaneous firmware functions (add-on
|
||||
* to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -70,8 +70,6 @@
|
|||
/**
|
||||
* @brief Initializes the NVIC peripheral according to the specified
|
||||
* parameters in the NVIC_InitStruct.
|
||||
* @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
|
||||
* function should be called before.
|
||||
* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
|
||||
* the configuration information for the specified NVIC peripheral.
|
||||
* @retval None
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_pwr.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Power Controller (PWR) peripheral:
|
||||
* + Backup Domain Access
|
||||
|
@ -15,7 +15,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_rcc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Reset and clock control (RCC) peripheral:
|
||||
* + Internal/external clocks, PLL, CSS and MCO configuration
|
||||
|
@ -37,7 +37,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -148,9 +148,14 @@ void RCC_DeInit(void)
|
|||
/* Set HSION bit */
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
|
||||
#if defined (STM32F0XX_MD)
|
||||
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0xF8FFB80C;
|
||||
|
||||
#else
|
||||
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */
|
||||
RCC->CFGR &= (uint32_t)0x08FFB80C;
|
||||
#endif /* STM32F0XX_MD */
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
|
||||
|
@ -565,7 +570,7 @@ void RCC_ClockSecuritySystemCmd(FunctionalState NewState)
|
|||
RCC->CR &= ~RCC_CR_CSSON;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined (STM32F0XX_MD)
|
||||
/**
|
||||
* @brief Selects the clock source to output on MCO pin (PA8).
|
||||
* @note PA8 should be configured in alternate function mode.
|
||||
|
@ -589,7 +594,52 @@ void RCC_MCOConfig(uint8_t RCC_MCOSource)
|
|||
/* Select MCO clock source and prescaler */
|
||||
*(__IO uint8_t *) CFGR_BYTE3_ADDRESS = RCC_MCOSource;
|
||||
}
|
||||
|
||||
#else
|
||||
/**
|
||||
* @brief Selects the clock source to output on MCO pin (PA8) and the corresponding
|
||||
* prescsaler.
|
||||
* @note PA8 should be configured in alternate function mode.
|
||||
* @param RCC_MCOSource: specifies the clock source to output.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_MCOSource_NoClock: No clock selected.
|
||||
* @arg RCC_MCOSource_HSI14: HSI14 oscillator clock selected.
|
||||
* @arg RCC_MCOSource_LSI: LSI oscillator clock selected.
|
||||
* @arg RCC_MCOSource_LSE: LSE oscillator clock selected.
|
||||
* @arg RCC_MCOSource_SYSCLK: System clock selected.
|
||||
* @arg RCC_MCOSource_HSI: HSI oscillator clock selected.
|
||||
* @arg RCC_MCOSource_HSE: HSE oscillator clock selected.
|
||||
* @arg RCC_MCOSource_PLLCLK_Div2: PLL clock divided by 2 selected.
|
||||
* @arg RCC_MCOSource_PLLCLK: PLL clock selected.
|
||||
* @param RCC_MCOPrescaler: specifies the prescaler on MCO pin.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_MCOPrescaler_1: MCO clock is divided by 1.
|
||||
* @arg RCC_MCOPrescaler_2: MCO clock is divided by 2.
|
||||
* @arg RCC_MCOPrescaler_4: MCO clock is divided by 4.
|
||||
* @arg RCC_MCOPrescaler_8: MCO clock is divided by 8.
|
||||
* @arg RCC_MCOPrescaler_16: MCO clock is divided by 16.
|
||||
* @arg RCC_MCOPrescaler_32: MCO clock is divided by 32.
|
||||
* @arg RCC_MCOPrescaler_64: MCO clock is divided by 64.
|
||||
* @arg RCC_MCOPrescaler_128: MCO clock is divided by 128.
|
||||
* @retval None
|
||||
*/
|
||||
void RCC_MCOConfig(uint8_t RCC_MCOSource, uint32_t RCC_MCOPrescaler)
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RCC_MCO_SOURCE(RCC_MCOSource));
|
||||
assert_param(IS_RCC_MCO_PRESCALER(RCC_MCOPrescaler));
|
||||
|
||||
/* Get CFGR value */
|
||||
tmpreg = RCC->CFGR;
|
||||
/* Clear MCOPRE[2:0] bits */
|
||||
tmpreg &= ~(RCC_CFGR_MCO_PRE | RCC_CFGR_MCO | RCC_CFGR_PLLNODIV);
|
||||
/* Set the RCC_MCOSource and RCC_MCOPrescaler */
|
||||
tmpreg |= (RCC_MCOPrescaler | ((uint32_t)RCC_MCOSource<<24));
|
||||
/* Store the new value */
|
||||
RCC->CFGR = tmpreg;
|
||||
}
|
||||
#endif /* STM32F0XX_MD */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_rtc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Real-Time Clock (RTC) peripheral:
|
||||
* + Initialization
|
||||
|
@ -202,7 +202,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -308,7 +308,6 @@ static uint8_t RTC_Bcd2ToByte(uint8_t Value);
|
|||
*/
|
||||
ErrorStatus RTC_DeInit(void)
|
||||
{
|
||||
__IO uint32_t wutcounter = 0x00;
|
||||
ErrorStatus status = ERROR;
|
||||
|
||||
/* Disable the write protection for RTC registers */
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Serial peripheral interface (SPI):
|
||||
* + Initialization and Configuration
|
||||
|
@ -39,6 +39,9 @@
|
|||
function.In I2S mode, program the Mode, Standard, Data Format, MCLK
|
||||
Output, Audio frequency and Polarity using I2S_Init() function.
|
||||
|
||||
(#) Configure the FIFO threshold using SPI_RxFIFOThresholdConfig() to select
|
||||
at which threshold the RXNE event is generated.
|
||||
|
||||
(#) Enable the NVIC and the corresponding interrupt using the function
|
||||
SPI_ITConfig() if you need to use interrupt mode.
|
||||
|
||||
|
@ -70,7 +73,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_syscfg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the SYSCFG peripheral:
|
||||
* + Remapping the memory mapped at 0x00000000
|
||||
|
@ -27,7 +27,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -177,6 +177,9 @@ void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewS
|
|||
* @arg SYSCFG_I2CFastModePlus_PB7: Configure fast mode plus driving capability for PB7
|
||||
* @arg SYSCFG_I2CFastModePlus_PB8: Configure fast mode plus driving capability for PB8
|
||||
* @arg SYSCFG_I2CFastModePlus_PB9: Configure fast mode plus driving capability for PB9
|
||||
* @arg SYSCFG_I2CFastModePlus_PA9: Configure fast mode plus driving capability for PA9 (only for STM32F0XX_LD and STM32F030 devices)
|
||||
* @arg SYSCFG_I2CFastModePlus_PA10: Configure fast mode plus driving capability for PA10 (only for STM32F0XX_LD and STM32F030 devices)
|
||||
* @arg SYSCFG_I2CFastModePlus_I2C1: Configure fast mode plus driving capability for PB10, PB11, PF6 and PF7(only for STM32F0XX_LD and STM32F030 devices)
|
||||
* @param NewState: new state of the DMA channel remapping.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note ENABLE: Enable fast mode plus driving capability for selected pin
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_tim.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the TIM peripheral:
|
||||
* + TimeBase management
|
||||
|
@ -96,7 +96,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -845,31 +845,40 @@ void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
|
|||
/* Set the Output State */
|
||||
tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
|
||||
|
||||
if(TIMx == TIM1)
|
||||
if((TIMx == TIM1) || (TIMx == TIM15))
|
||||
{
|
||||
assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
|
||||
assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
|
||||
assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
|
||||
|
||||
/* Reset the Output N Polarity level */
|
||||
tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP));
|
||||
/* Set the Output N Polarity */
|
||||
tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4);
|
||||
|
||||
/* Reset the Output N State */
|
||||
tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE));
|
||||
/* Set the Output N State */
|
||||
tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4);
|
||||
|
||||
/* Reset the Ouput Compare and Output Compare N IDLE State */
|
||||
/* Reset the Ouput Compare State */
|
||||
tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2));
|
||||
tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N));
|
||||
|
||||
/* Set the Output Idle state */
|
||||
tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2);
|
||||
/* Set the Output N Idle state */
|
||||
tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2);
|
||||
|
||||
if (TIMx == TIM1)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
|
||||
assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
|
||||
assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
|
||||
|
||||
/* Reset the Output N Polarity level */
|
||||
tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP));
|
||||
/* Set the Output N Polarity */
|
||||
tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4);
|
||||
|
||||
/* Reset the Output N State */
|
||||
tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE));
|
||||
/* Set the Output N State */
|
||||
tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4);
|
||||
|
||||
/* Reset the Output Compare N IDLE State */
|
||||
tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N));
|
||||
|
||||
/* Set the Output N Idle state */
|
||||
tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2);
|
||||
}
|
||||
}
|
||||
/* Write to TIMx CR2 */
|
||||
TIMx->CR2 = tmpcr2;
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_usart.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Universal synchronous asynchronous receiver
|
||||
* transmitter (USART):
|
||||
|
@ -60,7 +60,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f0xx_wwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.1
|
||||
* @date 20-April-2012
|
||||
* @version V1.2.1
|
||||
* @date 22-November-2013
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Window watchdog (WWDG) peripheral:
|
||||
* + Prescaler, Refresh window and Counter configuration
|
||||
|
@ -65,7 +65,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
Loading…
Reference in New Issue