Update STM32LXXX library from 1.2.2 to 1.3.0
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@ -2,12 +2,12 @@
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******************************************************************************
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* @file stm32l1xx.h
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* @author MCD Application Team
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* @version V1.2.0
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* @date 22-February-2013
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* @version V1.3.3
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* @date 20-April-2015
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* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.
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* This file contains all the peripheral register's definitions, bits
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* definitions and memory mapping for STM32L1xx High-density, Medium-density
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* and Medium-density Plus devices.
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* definitions and memory mapping for STM32L1xx High-density, Medium-density,
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* Medium-density and XL-density Plus devices.
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*
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* The file is the unique include file that the application programmer
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* is using in the C source code, usually in main.c. This file contains:
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@ -26,7 +26,7 @@
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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@ -66,26 +66,60 @@
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application
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*/
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#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD)
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#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD) && !defined (STM32L1XX_XL)
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/* #define STM32L1XX_MD */ /*!< - Ultra Low Power Medium-density devices: STM32L151x6xx, STM32L151x8xx,
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STM32L151xBxx, STM32L152x6xx, STM32L152x8xx and STM32L152xBxx.
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STM32L151xBxx, STM32L152x6xx, STM32L152x8xx, STM32L152xBxx,
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STM32L151x6xxA, STM32L151x8xxA, STM32L151xBxxA, STM32L152x6xxA,
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STM32L152x8xxA and STM32L152xBxxA.
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- Ultra Low Power Medium-density Value Line devices: STM32L100x6xx,
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STM32L100x8xx and STM32L100xBxx. */
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/* #define STM32L1XX_MDP */ /*!< - Ultra Low Power Medium-density Plus devices: STM32L151xCxx, STM32L152xCxx and STM32L162xCxx
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- Ultra Low Power Medium-density Plus Value Line devices: STM32L100xCxx */
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#define STM32L1XX_HD /*!< Ultra Low Power High-density devices: STM32L151xDxx, STM32L152xDxx and STM32L162xDxx */
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/* #define STM32L1XX_HD */ /*!< Ultra Low Power High-density devices: STM32L151xDxx, STM32L152xDxx and STM32L162xDxx */
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/* #define STM32L1XX_XL */ /*!< Ultra Low Power XL-density devices: STM32L151xExx, STM32L152xExx and STM32L162xExx */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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devices, you can define the device in your toolchain compiler preprocessor.
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*/
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#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD)
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#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD) && !defined (STM32L1XX_XL)
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#error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)"
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#endif
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/*
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The table below provides the list of available part numbers per category, and the corresponding preprocessor
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switch to be defined in the StdLib.
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==============================================================================================================+
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Memory density level | RPNs | StdLib switch | Cat.1 | Cat.2 | Cat.3 | Cat.4 | Cat.5 |
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==============================================================================================================+
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| STM32L100x6xx, STM32L151x6xx, | | | | | | |
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32KB | STM32L152x6xx, STM32L151x6xxA | STM32L1XX_MD | X | X | | | |
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| and STM32L152x6xxA | | | | | | |
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--------------------------------------------------------------------------------------------------------------+
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| STM32L100x8xx, STM32L151x8xx, | | | | | | |
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64KB | STM32L152x8xx, STM32L151x8xxA | STM32L1XX_MD | X | X | | | |
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| and STM32L152x8xxA | | | | | | |
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--------------------------------------------------------------------------------------------------------------+
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| STM32L100xBxx, STM32L151xBxx, | | | | | | |
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128KB | STM32L152xBxx, STM32L151xBxxA | STM32L1XX_MD | X | X | | | |
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| and STM32L152xBxxA | | | | | | |
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--------------------------------------------------------------------------------------------------------------+
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| STM32L100xCxx, STM32L151xCxx, | | | | | | |
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256KB | STM32L152xCxx and | STM32L1XX_MDP | | | X | X | |
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| STM32L162xCxx | | | | | | |
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--------------------------------------------------------------------------------------------------------------+
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| STM32L151xDxx, STM32L152xDxx | | | | | | |
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384KB | and STM32L162xDxx | STM32L1XX_HD | | | | X | |
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--------------------------------------------------------------------------------------------------------------+
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| STM32L151xExx, STM32L152xExx | | | | | | |
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512KB | and STM32L162xExx | STM32L1XX_XL | | | | | X |
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==============================================================================================================+
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*/
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#if !defined USE_STDPERIPH_DRIVER
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/**
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* @brief Comment the line below if you will not use the peripherals drivers.
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Timeout value
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*/
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */
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#define HSE_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSE start up */
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#endif
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/**
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Timeout value
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*/
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#if !defined (HSI_STARTUP_TIMEOUT)
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#define HSI_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSI start up */
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#define HSI_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSI start up */
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#endif
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#if !defined (HSI_VALUE)
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#endif
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/**
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* @brief STM32L1xx Standard Peripheral Library version number V1.2.0
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* @brief STM32L1xx Standard Peripheral Library version number V1.3.3
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*/
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#define __STM32L1XX_STDPERIPH_VERSION_MAIN (0x01) /*!< [31:24] main version */
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#define __STM32L1XX_STDPERIPH_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
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#define __STM32L1XX_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32L1XX_STDPERIPH_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
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#define __STM32L1XX_STDPERIPH_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
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#define __STM32L1XX_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32L1XX_STDPERIPH_VERSION ( (__STM32L1XX_STDPERIPH_VERSION_MAIN << 24)\
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|(__STM32L1XX_STDPERIPH_VERSION_SUB1 << 16)\
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@ -225,6 +259,7 @@ typedef enum IRQn
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RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
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USB_FS_WKUP_IRQn = 42, /*!< USB FS WakeUp from suspend through EXTI Line Interrupt */
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TIM6_IRQn = 43, /*!< TIM6 global Interrupt */
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#ifdef STM32L1XX_MD
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TIM7_IRQn = 44 /*!< TIM7 global Interrupt */
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#endif /* STM32L1XX_MD */
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AES_IRQn = 55, /*!< AES global Interrupt */
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COMP_ACQ_IRQn = 56 /*!< Comparator Channel Acquisition global Interrupt */
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#endif /* STM32L1XX_HD */
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#ifdef STM32L1XX_XL
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TIM7_IRQn = 44, /*!< TIM7 global Interrupt */
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TIM5_IRQn = 46, /*!< TIM5 global Interrupt */
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SPI3_IRQn = 47, /*!< SPI3 global Interrupt */
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UART4_IRQn = 48, /*!< UART4 global Interrupt */
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UART5_IRQn = 49, /*!< UART5 global Interrupt */
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DMA2_Channel1_IRQn = 50, /*!< DMA2 Channel 1 global Interrupt */
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DMA2_Channel2_IRQn = 51, /*!< DMA2 Channel 2 global Interrupt */
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DMA2_Channel3_IRQn = 52, /*!< DMA2 Channel 3 global Interrupt */
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DMA2_Channel4_IRQn = 53, /*!< DMA2 Channel 4 global Interrupt */
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DMA2_Channel5_IRQn = 54, /*!< DMA2 Channel 5 global Interrupt */
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AES_IRQn = 55, /*!< AES global Interrupt */
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COMP_ACQ_IRQn = 56 /*!< Comparator Channel Acquisition global Interrupt */
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#endif /* STM32L1XX_XL */
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} IRQn_Type;
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/**
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/* GNU Compiler
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------------
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RAM functions are defined using a specific toolchain attribute
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"__attribute__((section(".data")))".
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"__attribute__((section(".RamFunc")))".
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*/
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#define __RAM_FUNC FLASH_Status __attribute__((section(".data")))
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#define __RAM_FUNC FLASH_Status __attribute__((section(".RamFunc")))
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#elif defined ( __TASKING__ )
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/* TASKING Compiler
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@ -488,10 +538,19 @@ typedef struct
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__IO uint32_t SR; /*!< Status register, Address offset: 0x18 */
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__IO uint32_t OBR; /*!< Option byte register, Address offset: 0x1c */
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__IO uint32_t WRPR; /*!< Write protection register, Address offset: 0x20 */
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uint32_t RESERVED[23]; /*!< Reserved, 0x24 */
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__IO uint32_t WRPR1; /*!< Write protection register 1, Address offset: 0x28 */
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__IO uint32_t WRPR2; /*!< Write protection register 2, Address offset: 0x2C */
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uint32_t RESERVED[23]; /*!< Reserved, 0x24-0x7C */
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__IO uint32_t WRPR1; /*!< Write protection register 1, Address offset: 0x80 */
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__IO uint32_t WRPR2; /*!< Write protection register 2, Address offset: 0x84 */
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__IO uint32_t WRPR3; /*!< Write protection register 3, Address offset: 0x88 */
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} FLASH_TypeDef;
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/* IMPORTANT NOTE
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==============
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In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
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- WRPR correspond to WRPR1
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- WRPR1 correspond to WRPR2
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- WRPR2 correspond to WRPR3
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- WRPR3 correspond to WRPR4
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*/
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/**
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* @brief Option Bytes Registers
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__IO uint32_t WRP67; /*!< write protection register 6 7, Address offset: 0x14 */
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__IO uint32_t WRP89; /*!< write protection register 8 9, Address offset: 0x18 */
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__IO uint32_t WRP1011; /*!< write protection register 10 11, Address offset: 0x1C */
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uint32_t RESERVED[24]; /*!< Reserved, 0x20-0x7C */
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__IO uint32_t WRP1213; /*!< write protection register 12 13, Address offset: 0x80 */
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__IO uint32_t WRP1415; /*!< write protection register 14 15, Address offset: 0x84 */
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} OB_TypeDef;
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/**
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__IO uint16_t BSRRH; /*!< GPIO port bit set/reset high registerBSRR, Address offset: 0x1A */
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__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
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__IO uint32_t AFR[2]; /*!< GPIO alternate function low register, Address offset: 0x20-0x24 */
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#if defined (STM32L1XX_HD) || defined (STM32L1XX_XL)
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__IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */
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uint16_t RESERVED3; /*!< Reserved, 0x2A */
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#endif
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} GPIO_TypeDef;
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/**
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typedef struct
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{
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__IO uint32_t ICR; /*!< RI input capture register, Address offset: 0x00 */
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__IO uint32_t ASCR1; /*!< RI analog switches control register, Address offset: 0x04 */
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__IO uint32_t ASCR2; /*!< RI analog switch control register 2, Address offset: 0x08 */
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__IO uint32_t HYSCR1; /*!< RI hysteresis control register, Address offset: 0x0C */
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__IO uint32_t HYSCR2; /*!< RI Hysteresis control register, Address offset: 0x10 */
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__IO uint32_t HYSCR3; /*!< RI Hysteresis control register, Address offset: 0x14 */
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__IO uint32_t HYSCR4; /*!< RI Hysteresis control register, Address offset: 0x18 */
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__IO uint32_t ICR; /*!< RI input capture register, Address offset: 0x04 */
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__IO uint32_t ASCR1; /*!< RI analog switches control register, Address offset: 0x08 */
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__IO uint32_t ASCR2; /*!< RI analog switch control register 2, Address offset: 0x0C */
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__IO uint32_t HYSCR1; /*!< RI hysteresis control register 1, Address offset: 0x10 */
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__IO uint32_t HYSCR2; /*!< RI Hysteresis control register 2, Address offset: 0x14 */
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__IO uint32_t HYSCR3; /*!< RI Hysteresis control register 3, Address offset: 0x18 */
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__IO uint32_t HYSCR4; /*!< RI Hysteresis control register 4, Address offset: 0x1C */
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__IO uint32_t ASMR1; /*!< RI Analog switch mode register 1, Address offset: 0x20 */
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__IO uint32_t CMR1; /*!< RI Channel mask register 1, Address offset: 0x24 */
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__IO uint32_t CICR1; /*!< RI Channel identification for capture register 1, Address offset: 0x28 */
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__IO uint32_t ASMR2; /*!< RI Analog switch mode register 2, Address offset: 0x2C */
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__IO uint32_t CMR2; /*!< RI Channel mask register 2, Address offset: 0x30 */
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__IO uint32_t CICR2; /*!< RI Channel identification for capture register 2, Address offset: 0x34 */
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__IO uint32_t ASMR3; /*!< RI Analog switch mode register 3, Address offset: 0x38 */
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__IO uint32_t CMR3; /*!< RI Channel mask register 3, Address offset: 0x3C */
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__IO uint32_t CICR3; /*!< RI Channel identification for capture register3 , Address offset: 0x40 */
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__IO uint32_t ASMR4; /*!< RI Analog switch mode register 4, Address offset: 0x44 */
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__IO uint32_t CMR4; /*!< RI Channel mask register 4, Address offset: 0x48 */
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__IO uint32_t CICR4; /*!< RI Channel identification for capture register 4, Address offset: 0x4C */
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__IO uint32_t ASMR5; /*!< RI Analog switch mode register 5, Address offset: 0x50 */
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__IO uint32_t CMR5; /*!< RI Channel mask register 5, Address offset: 0x54 */
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__IO uint32_t CICR5; /*!< RI Channel identification for capture register 5, Address offset: 0x58 */
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} RI_TypeDef;
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/**
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#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */
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/*!< Unique device ID registers */
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#if defined (STM32L1XX_MD)
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#define UID1 ((uint32_t)0x1FF80050)
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#define UID2 ((uint32_t)0x1FF80054)
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#define UID3 ((uint32_t)0x1FF80064)
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#elif defined (STM32L1XX_MDP) || defined (STM32L1XX_HD) || defined (STM32L1XX_XL)
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#define UID1 ((uint32_t)0x1FF800D0)
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#define UID2 ((uint32_t)0x1FF800D4)
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#define UID3 ((uint32_t)0x1FF800E4)
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#endif
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/**
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* @}
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*/
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#define RI_HYSCR4_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
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#define RI_HYSCR4_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
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/******************** Bit definition for RI_ASMR1 register ********************/
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#define RI_ASMR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A analog switch mode selection */
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#define RI_ASMR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
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#define RI_ASMR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
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#define RI_ASMR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
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#define RI_ASMR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
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#define RI_ASMR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
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#define RI_ASMR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
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#define RI_ASMR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
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#define RI_ASMR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
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#define RI_ASMR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
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#define RI_ASMR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
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#define RI_ASMR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
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#define RI_ASMR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
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#define RI_ASMR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
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#define RI_ASMR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
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#define RI_ASMR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
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#define RI_ASMR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
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/******************** Bit definition for RI_CMR1 register ********************/
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#define RI_CMR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A channel masking */
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#define RI_CMR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
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#define RI_CMR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
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#define RI_CMR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
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#define RI_CMR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
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#define RI_CMR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
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#define RI_CMR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
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#define RI_CMR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
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#define RI_CMR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
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#define RI_CMR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
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#define RI_CMR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
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#define RI_CMR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
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#define RI_CMR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
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#define RI_CMR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
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#define RI_CMR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
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#define RI_CMR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
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#define RI_CMR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
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/******************** Bit definition for RI_CICR1 register ********************/
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#define RI_CICR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A channel identification for capture */
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#define RI_CICR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
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#define RI_CICR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
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#define RI_CICR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
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#define RI_CICR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
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#define RI_CICR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
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#define RI_CICR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
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#define RI_CICR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
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#define RI_CICR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
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#define RI_CICR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CICR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CICR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CICR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CICR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CICR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CICR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CICR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_ASMR2 register ********************/
|
||||
#define RI_ASMR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B analog switch mode selection */
|
||||
#define RI_ASMR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_ASMR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_ASMR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_ASMR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_ASMR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_ASMR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_ASMR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_ASMR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_ASMR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_ASMR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_ASMR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_ASMR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_ASMR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_ASMR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_ASMR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_ASMR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CMR2 register ********************/
|
||||
#define RI_CMR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B channel masking */
|
||||
#define RI_CMR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CMR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CMR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CMR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CMR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CMR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CMR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CMR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CMR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CMR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CMR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CMR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CMR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CMR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CMR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CMR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CICR2 register ********************/
|
||||
#define RI_CICR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B channel identification for capture */
|
||||
#define RI_CICR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CICR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CICR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CICR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CICR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CICR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CICR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CICR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CICR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CICR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CICR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CICR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CICR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CICR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CICR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CICR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_ASMR3 register ********************/
|
||||
#define RI_ASMR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C analog switch mode selection */
|
||||
#define RI_ASMR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_ASMR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_ASMR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_ASMR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_ASMR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_ASMR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_ASMR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_ASMR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_ASMR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_ASMR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_ASMR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_ASMR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_ASMR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_ASMR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_ASMR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_ASMR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CMR3 register ********************/
|
||||
#define RI_CMR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C channel masking */
|
||||
#define RI_CMR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CMR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CMR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CMR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CMR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CMR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CMR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CMR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CMR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CMR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CMR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CMR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CMR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CMR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CMR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CMR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CICR3 register ********************/
|
||||
#define RI_CICR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C channel identification for capture */
|
||||
#define RI_CICR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CICR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CICR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CICR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CICR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CICR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CICR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CICR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CICR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CICR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CICR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CICR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CICR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CICR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CICR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CICR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_ASMR4 register ********************/
|
||||
#define RI_ASMR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F analog switch mode selection */
|
||||
#define RI_ASMR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_ASMR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_ASMR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_ASMR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_ASMR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_ASMR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_ASMR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_ASMR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_ASMR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_ASMR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_ASMR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_ASMR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_ASMR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_ASMR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_ASMR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_ASMR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CMR4 register ********************/
|
||||
#define RI_CMR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F channel masking */
|
||||
#define RI_CMR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CMR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CMR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CMR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CMR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CMR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CMR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CMR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CMR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CMR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CMR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CMR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CMR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CMR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CMR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CMR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CICR4 register ********************/
|
||||
#define RI_CICR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F channel identification for capture */
|
||||
#define RI_CICR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CICR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CICR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CICR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CICR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CICR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CICR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CICR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CICR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CICR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CICR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CICR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CICR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CICR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CICR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CICR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_ASMR5 register ********************/
|
||||
#define RI_ASMR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G analog switch mode selection */
|
||||
#define RI_ASMR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_ASMR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_ASMR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_ASMR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_ASMR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_ASMR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_ASMR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_ASMR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_ASMR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_ASMR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_ASMR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_ASMR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_ASMR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_ASMR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_ASMR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_ASMR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CMR5 register ********************/
|
||||
#define RI_CMR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G channel masking */
|
||||
#define RI_CMR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CMR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CMR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CMR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CMR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CMR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CMR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CMR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CMR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CMR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CMR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CMR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CMR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CMR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CMR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CMR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************** Bit definition for RI_CICR5 register ********************/
|
||||
#define RI_CICR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G channel identification for capture */
|
||||
#define RI_CICR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define RI_CICR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define RI_CICR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
#define RI_CICR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
|
||||
#define RI_CICR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
|
||||
#define RI_CICR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
|
||||
#define RI_CICR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
|
||||
#define RI_CICR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
|
||||
#define RI_CICR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
|
||||
#define RI_CICR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
|
||||
#define RI_CICR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
|
||||
#define RI_CICR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
|
||||
#define RI_CICR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
|
||||
#define RI_CICR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
|
||||
#define RI_CICR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
|
||||
#define RI_CICR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* Timers (TIM) */
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32l1xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
@ -10,6 +10,13 @@
|
|||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<link rel="File-List" href="Release_Notes%20%28package%29_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Release_Notes%20%28package%29_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32L1xx CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>tguilhot</o:LastAuthor> <o:Revision>145</o:Revision> <o:TotalTime>461</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2010-12-13T14:14:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>358</o:Words> <o:Characters>2045</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>17</o:Lines> <o:Paragraphs>4</o:Paragraphs> <o:CharactersWithSpaces>2399</o:CharactersWithSpaces> <o:Version>11.9999</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:View>Normal</w:View> <w:SpellingState>Clean</w:SpellingState> <w:GrammarState>Clean</w:GrammarState> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:Compatibility> <w:UseFELayout/> </w:Compatibility> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
@ -278,7 +285,7 @@ ul
|
|||
Notes for<o:p></o:p> STM32L1xx CMSIS<br>
|
||||
</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
|
||||
© 2013 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
© 2015 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt;"><img style="border: 0px solid ; width: 86px; height: 65px;" alt="" id="_x0000_i1025" src="../../../../../_htmresc/logo.bmp"></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
|
@ -289,12 +296,173 @@ Notes for<o:p></o:p> STM32L1xx CMSIS<br>
|
|||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32L1xx CMSIS update history</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32L1xx CMSIS update history</span></h2><br>
|
||||
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update history</span></h2>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.3 / 20-April-2015<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">V1.3.3 official release</span>, no changes vs. release candidate version (V1.3.3RC1)<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.3RC1 / 15-July-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add UID registers mapping</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add product categories information</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add FLASH WRPR4 register definition <br>
|
||||
</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IMPORTANT NOTE: In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR correspond to WRPR1</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR1 correspond to WRPR2</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR2 correspond to WRPR3</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR3 correspond to WRPR4</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.2 / 10-April-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.</span></li>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.1 / 06-March-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx.h</span><span style="font-size: 10pt; font-family: Verdana;">: update RAM functions attribute definition for GNU compiler</span></li>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.0 / 31-January-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold; font-style: italic;">STM32L1xx XL-density</span> devices </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">"Ultra Low Power XL-density devices: STM32L151x<span style="font-weight: bold;">E</span>xx, STM32L152x<span style="font-weight: bold;">E</span>xx and STM32L162x<span style="font-weight: bold;">E</span>xx"</span></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new startup file <span style="font-style: italic;">startup_stm32l1xx_xl.s</span> for all toolchains</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add new macro <span style="font-style: italic;">STM32L1XX_XL</span> for XL-density devices<span style="font-style: italic;"></span></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">IRQn</span> enumeration for <span style="font-style: italic;">STM32L1XX_XL</span></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">GPIO BRR register is declared only for STM32L1XX_HD and STM32L1XX_XL devices</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All devices </span><span style="font-size: 10pt; font-family: Verdana;">definition </span><span style="font-size: 10pt; font-family: Verdana;">(i.e. STM32L1XX_xx) are commented out, user need to define the right STM32L1xx device in the toolchain compiler preprocessor</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Extend <span style="font-style: italic;">HSE_STARTUP_TIMEOUT</span> and <span style="font-style: italic;">HSI_STARTUP_TIMEOUT</span> values to 0x5000</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.1 / 19-June-2013<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx.h</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update <span style="font-style: italic;">RI_TypeDef</span> structure by adding registers <span style="font-style: italic;">RI_ASMRx</span>, <span style="font-style: italic;">RI_CMRx</span> and <span style="font-style: italic;">RI_CICRx</span> (x=1..5)</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add bits definition for </span><span style="font-size: 10pt; font-family: Verdana;">registers <span style="font-style: italic;">RI_ASMRx</span>, <span style="font-style: italic;">RI_CMRx</span> and <span style="font-style: italic;">RI_CICRx</span> (x=1..5)</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 22-February-2013<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_hd.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power High-density Devices vector table for
|
||||
* Atollic toolchain.
|
||||
* This module performs:
|
||||
|
@ -18,7 +18,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_md.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power Medium-density Devices vector table for
|
||||
* Atollic toolchain.
|
||||
* This module performs:
|
||||
|
@ -18,7 +18,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_mdp.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power Medium-density Plus Devices vector table
|
||||
* for Atollic toolchain.
|
||||
* This module performs:
|
||||
|
@ -18,7 +18,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -0,0 +1,421 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l1xx_xl.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power XL-density Devices vector table for
|
||||
* Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word USB_HP_IRQHandler
|
||||
.word USB_LP_IRQHandler
|
||||
.word DAC_IRQHandler
|
||||
.word COMP_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word LCD_IRQHandler
|
||||
.word TIM9_IRQHandler
|
||||
.word TIM10_IRQHandler
|
||||
.word TIM11_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USB_FS_WKUP_IRQHandler
|
||||
.word TIM6_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word 0
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word AES_IRQHandler
|
||||
.word COMP_ACQ_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32L15x ULtra Low Power High-density devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_STAMP_IRQHandler
|
||||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_IRQHandler
|
||||
.thumb_set USB_HP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_IRQHandler
|
||||
.thumb_set USB_LP_IRQHandler,Default_Handler
|
||||
|
||||
.weak DAC_IRQHandler
|
||||
.thumb_set DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LCD_IRQHandler
|
||||
.thumb_set LCD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM9_IRQHandler
|
||||
.thumb_set TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM10_IRQHandler
|
||||
.thumb_set TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM11_IRQHandler
|
||||
.thumb_set TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_FS_WKUP_IRQHandler
|
||||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_IRQHandler
|
||||
.thumb_set TIM6_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak AES_IRQHandler
|
||||
.thumb_set AES_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_ACQ_IRQHandler
|
||||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -1,8 +1,8 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_hd.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power High-density Devices vector
|
||||
;* table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power Medium-density Devices vector
|
||||
;* table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_mdp.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power Medium-density Plus Devices vector
|
||||
;* table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
|
|
|
@ -0,0 +1,354 @@
|
|||
;******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_xl.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power XL-density Devices vector
|
||||
;* table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD USB_HP_IRQHandler ; USB High Priority
|
||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
||||
DCD DAC_IRQHandler ; DAC
|
||||
DCD COMP_IRQHandler ; COMP through EXTI Line
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD LCD_IRQHandler ; LCD
|
||||
DCD TIM9_IRQHandler ; TIM9
|
||||
DCD TIM10_IRQHandler ; TIM10
|
||||
DCD TIM11_IRQHandler ; TIM11
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
|
||||
DCD TIM6_IRQHandler ; TIM6
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD AES_IRQHandler ; AES
|
||||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler routine
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT __main
|
||||
IMPORT SystemInit
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMPER_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
||||
EXPORT ADC1_IRQHandler [WEAK]
|
||||
EXPORT USB_HP_IRQHandler [WEAK]
|
||||
EXPORT USB_LP_IRQHandler [WEAK]
|
||||
EXPORT DAC_IRQHandler [WEAK]
|
||||
EXPORT COMP_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT LCD_IRQHandler [WEAK]
|
||||
EXPORT TIM9_IRQHandler [WEAK]
|
||||
EXPORT TIM10_IRQHandler [WEAK]
|
||||
EXPORT TIM11_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT USB_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT TIM6_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
||||
EXPORT AES_IRQHandler [WEAK]
|
||||
EXPORT COMP_ACQ_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMPER_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Channel1_IRQHandler
|
||||
DMA1_Channel2_IRQHandler
|
||||
DMA1_Channel3_IRQHandler
|
||||
DMA1_Channel4_IRQHandler
|
||||
DMA1_Channel5_IRQHandler
|
||||
DMA1_Channel6_IRQHandler
|
||||
DMA1_Channel7_IRQHandler
|
||||
ADC1_IRQHandler
|
||||
USB_HP_IRQHandler
|
||||
USB_LP_IRQHandler
|
||||
DAC_IRQHandler
|
||||
COMP_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
LCD_IRQHandler
|
||||
TIM9_IRQHandler
|
||||
TIM10_IRQHandler
|
||||
TIM11_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
USB_FS_WKUP_IRQHandler
|
||||
TIM6_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
DMA2_Channel1_IRQHandler
|
||||
DMA2_Channel2_IRQHandler
|
||||
DMA2_Channel3_IRQHandler
|
||||
DMA2_Channel4_IRQHandler
|
||||
DMA2_Channel5_IRQHandler
|
||||
AES_IRQHandler
|
||||
COMP_ACQ_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_hd.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power High-density Devices vector table for
|
||||
* RIDE7 toolchain.
|
||||
* This module performs:
|
||||
|
@ -17,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_md.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power Medium-density Devices vector table for
|
||||
* RIDE7 toolchain.
|
||||
* This module performs:
|
||||
|
@ -17,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file startup_stm32l1xx_mdp.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power Medium-density Plus Devices vector table
|
||||
* for RIDE7 toolchain.
|
||||
* This module performs:
|
||||
|
@ -17,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -0,0 +1,416 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l1xx_xl.s
|
||||
* @author MCD Application Team
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief STM32L1xx Ultra Low Power XL-density Devices vector table for
|
||||
* RIDE7 toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/*******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word USB_HP_IRQHandler
|
||||
.word USB_LP_IRQHandler
|
||||
.word DAC_IRQHandler
|
||||
.word COMP_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word LCD_IRQHandler
|
||||
.word TIM9_IRQHandler
|
||||
.word TIM10_IRQHandler
|
||||
.word TIM11_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USB_FS_WKUP_IRQHandler
|
||||
.word TIM6_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word 0
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word AES_IRQHandler
|
||||
.word COMP_ACQ_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32L15x ULtra Low Power High-density devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_STAMP_IRQHandler
|
||||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_IRQHandler
|
||||
.thumb_set USB_HP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_IRQHandler
|
||||
.thumb_set USB_LP_IRQHandler,Default_Handler
|
||||
|
||||
.weak DAC_IRQHandler
|
||||
.thumb_set DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LCD_IRQHandler
|
||||
.thumb_set LCD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM9_IRQHandler
|
||||
.thumb_set TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM10_IRQHandler
|
||||
.thumb_set TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM11_IRQHandler
|
||||
.thumb_set TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_FS_WKUP_IRQHandler
|
||||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_IRQHandler
|
||||
.thumb_set TIM6_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak AES_IRQHandler
|
||||
.thumb_set AES_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_ACQ_IRQHandler
|
||||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
|
||||
|
||||
/************************* (C) COPYRIGHT STMicroelectronics *****END OF FILE***/
|
||||
|
|
@ -1,8 +1,8 @@
|
|||
;/******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_hd.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power High-density Devices vector
|
||||
;* table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
|
@ -141,7 +141,7 @@ __vector_table
|
|||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
@ -149,394 +149,394 @@ Reset_Handler
|
|||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK SDIO_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SDIO_IRQHandler
|
||||
B SDIO_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel1_IRQHandler
|
||||
B DMA2_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel2_IRQHandler
|
||||
B DMA2_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel3_IRQHandler
|
||||
B DMA2_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel4_IRQHandler
|
||||
B DMA2_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel5_IRQHandler
|
||||
B DMA2_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK AES_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
AES_IRQHandler
|
||||
B AES_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_ACQ_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_ACQ_IRQHandler
|
||||
B COMP_ACQ_IRQHandler
|
||||
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
;/******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_md.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power Medium-density Devices vector
|
||||
;* table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
|
@ -129,7 +129,7 @@ __vector_table
|
|||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
@ -137,325 +137,325 @@ Reset_Handler
|
|||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
;/******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
|
||||
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_mdp.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.2.0
|
||||
;* Date : 22-February-2013
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power Medium-density Plus Devices vector
|
||||
;* table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
|
@ -141,7 +141,7 @@ __vector_table
|
|||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER(2)
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
|
@ -149,370 +149,370 @@ Reset_Handler
|
|||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel1_IRQHandler
|
||||
B DMA2_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel2_IRQHandler
|
||||
B DMA2_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel3_IRQHandler
|
||||
B DMA2_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel4_IRQHandler
|
||||
B DMA2_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel5_IRQHandler
|
||||
B DMA2_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK AES_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
AES_IRQHandler
|
||||
B AES_IRQHandler
|
||||
|
||||
PUBWEAK COMP_ACQ_IRQHandler
|
||||
SECTION .text:CODE:REORDER(1)
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_ACQ_IRQHandler
|
||||
B COMP_ACQ_IRQHandler
|
||||
|
||||
|
|
|
@ -0,0 +1,538 @@
|
|||
;/******************** (C) COPYRIGHT 2015 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32l1xx_xl.s
|
||||
;* Author : MCD Application Team
|
||||
;* Version : V1.3.3
|
||||
;* Date : 20-April-2015
|
||||
;* Description : STM32L1xx Ultra Low Power XL-density Devices vector
|
||||
;* table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == __iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;*
|
||||
;* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
;* You may not use this file except in compliance with the License.
|
||||
;* You may obtain a copy of the License at:
|
||||
;*
|
||||
;* http://www.st.com/software_license_agreement_liberty_v2
|
||||
;*
|
||||
;* Unless required by applicable law or agreed to in writing, software
|
||||
;* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
;* See the License for the specific language governing permissions and
|
||||
;* limitations under the License.
|
||||
;*
|
||||
;*******************************************************************************/
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window Watchdog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detect
|
||||
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line 0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line 1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line 2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line 3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line 4
|
||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
||||
DCD ADC1_IRQHandler ; ADC1
|
||||
DCD USB_HP_IRQHandler ; USB High Priority
|
||||
DCD USB_LP_IRQHandler ; USB Low Priority
|
||||
DCD DAC_IRQHandler ; DAC
|
||||
DCD COMP_IRQHandler ; COMP through EXTI Line
|
||||
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
|
||||
DCD LCD_IRQHandler ; LCD
|
||||
DCD TIM9_IRQHandler ; TIM9
|
||||
DCD TIM10_IRQHandler ; TIM10
|
||||
DCD TIM11_IRQHandler ; TIM11
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
|
||||
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
|
||||
DCD TIM6_IRQHandler ; TIM6
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
||||
DCD AES_IRQHandler ; AES
|
||||
DCD COMP_ACQ_IRQHandler ; Comparator Channel Acquisition
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK PVD_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PVD_IRQHandler
|
||||
B PVD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TAMPER_STAMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TAMPER_STAMP_IRQHandler
|
||||
B TAMPER_STAMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel1_IRQHandler
|
||||
B DMA1_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel2_IRQHandler
|
||||
B DMA1_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel3_IRQHandler
|
||||
B DMA1_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel4_IRQHandler
|
||||
B DMA1_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel5_IRQHandler
|
||||
B DMA1_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel6_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel6_IRQHandler
|
||||
B DMA1_Channel6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA1_Channel7_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA1_Channel7_IRQHandler
|
||||
B DMA1_Channel7_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK ADC1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
ADC1_IRQHandler
|
||||
B ADC1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_HP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_HP_IRQHandler
|
||||
B USB_HP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_LP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_LP_IRQHandler
|
||||
B USB_LP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DAC_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DAC_IRQHandler
|
||||
B DAC_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_IRQHandler
|
||||
B COMP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK LCD_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
LCD_IRQHandler
|
||||
B LCD_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM9_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM9_IRQHandler
|
||||
B TIM9_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM10_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM10_IRQHandler
|
||||
B TIM10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM11_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM11_IRQHandler
|
||||
B TIM11_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK USB_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
USB_FS_WKUP_IRQHandler
|
||||
B USB_FS_WKUP_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM6_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM6_IRQHandler
|
||||
B TIM6_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Channel1_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel1_IRQHandler
|
||||
B DMA2_Channel1_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel2_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel2_IRQHandler
|
||||
B DMA2_Channel2_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel3_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel3_IRQHandler
|
||||
B DMA2_Channel3_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel4_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel4_IRQHandler
|
||||
B DMA2_Channel4_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK DMA2_Channel5_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DMA2_Channel5_IRQHandler
|
||||
B DMA2_Channel5_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK AES_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
AES_IRQHandler
|
||||
B AES_IRQHandler
|
||||
|
||||
|
||||
PUBWEAK COMP_ACQ_IRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
COMP_ACQ_IRQHandler
|
||||
B COMP_ACQ_IRQHandler
|
||||
|
||||
END
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32l1xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.3
|
||||
* @date 20-April-2015
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
* This file contains the system clock configuration for STM32L1xx Ultra
|
||||
* Low Power devices, and is generated by the clock configuration
|
||||
|
@ -75,7 +75,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
@ -9,6 +9,11 @@
|
|||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<link rel="File-List" href="Release_Notes%20%28package%29_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Release_Notes%20%28package%29_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32L1xx Standard Peripherals Library Drivers</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>tguilhot</o:LastAuthor> <o:Revision>145</o:Revision> <o:TotalTime>461</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2010-12-13T14:14:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>358</o:Words> <o:Characters>2045</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>17</o:Lines> <o:Paragraphs>4</o:Paragraphs> <o:CharactersWithSpaces>2399</o:CharactersWithSpaces> <o:Version>11.9999</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:View>Normal</w:View> <w:SpellingState>Clean</w:SpellingState> <w:GrammarState>Clean</w:GrammarState> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:Compatibility> <w:UseFELayout/> </w:Compatibility> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
@ -277,7 +282,7 @@ ul
|
|||
Notes for<o:p></o:p> </span><span style="font-size: 20pt; color: rgb(51, 102, 255); font-family: Verdana;">STM32L1xx Standard Peripherals Library Drivers</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span><br>
|
||||
<span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
|
||||
© 2013 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
© 2015 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt;"><img style="border: 0px solid ; width: 86px; height: 65px;" alt="" id="_x0000_i1025" src="../../_htmresc/logo.bmp"></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
|
@ -288,12 +293,175 @@ Notes for<o:p></o:p> </span><span style="font-size: 20pt; color: rgb(51, 102, 25
|
|||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0cm;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#History">STM32L1xx Standard Peripherals Library Drivers update history</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32L1xx Standard Peripherals Library Drivers update history</span></h2><br>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update history</span></h2>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.1 / 20-April-2015<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold;">V1.3.1 official release</span><br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_rcc.c: </span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||
<ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add note in the RCC_LSEConfig() function header: <br>
|
||||
</span></li></ul>
|
||||
</ul>
|
||||
<div style="margin-left: 80px;"><span style="font-size: 10pt; font-family: Verdana;"> * @note <span style="font-weight: bold;">Care must be taken when using this function to configure LSE mode </span></span><br>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"> * <span style="font-weight: bold;">as it clears systematically the LSEON bit before any new configuration.</span></span></div>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.1RC1 / 15-July-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_flash.c/.h: </span><span style="font-size: 10pt; font-family: Verdana;"></span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Fix <span style="font-style: italic;">FLASH_OB_RDPConfig()</span> to avoid side effect on SPRMOD <br>
|
||||
</span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add 2 new functions </span><span style="font-size: 10pt; font-family: Verdana;">to support WRPR4 register of </span><span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;">STM32L1XX_XL devices</span></li>
|
||||
<ul style="font-style: italic;">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">FLASH_Status FLASH_OB_WRP3Config(uint32_t OB_WRP3, FunctionalState NewState)</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">uint32_t FLASH_OB_GetWRP3(void)</span><br>
|
||||
</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IMPORTANT
|
||||
NOTE: In the StdLib, the naming of WRP registers is shifted vs. the
|
||||
Reference Manual, see below, this will not be changed to keep
|
||||
compatibility with previous version of the Library <br>
|
||||
</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR correspond to WRPR1</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR1 correspond to WRPR2</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR2 correspond to WRPR3</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">WRPR3 correspond to WRPR4</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
<li><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_pwr.c</span><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><o:p></o:p></span><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"></span><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"></span></li>
|
||||
</ul>
|
||||
|
||||
<ul>
|
||||
<ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">Fix <span style="font-style: italic;">PWR_EnterSTANDBYMode()</span> to not clear Wakeup flag (WUF), <span style="font-weight: bold;">this flag need to be cleared at application level before to call this function</span></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><span style="font-style: italic;">PWR_EnterSleepMode()</span>: update
|
||||
usage of __WFE() in low power entry function; if there is a pending
|
||||
event, calling __WFE() will not enter the CortexM3 core to sleep mode.
|
||||
The solution is to made the call below; the first __WFE() is always
|
||||
ignored and clears the event if one was already pending, the second is
|
||||
always applied<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
|
||||
<div style="margin-left: 120px;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">__SEV()</span><br>
|
||||
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";">__WFE()</span><br>
|
||||
<span style="font-size: 10pt; font-family: "Verdana","sans-serif";">__WFE()</span></div>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.0 / 31-January-2014<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold; font-style: italic;">STM32L1xx XL-density</span> devices </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-style: italic;">"Ultra Low Power XL-density devices: STM32L151x<span style="font-weight: bold;">E</span>xx, STM32L152x<span style="font-weight: bold;">E</span>xx and STM32L162x<span style="font-weight: bold;">E</span>xx"</span></span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_flash.h: extend Data memory range to 0x3FFF (16KB) and Program memory </span><span style="font-size: 10pt; font-family: Verdana;">range </span><span style="font-size: 10pt; font-family: Verdana;">to 0x7FFFF (512KB)</span></li>
|
||||
</ul>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_flash.c & stm32l1xx_flash_ramfunc.c: add reference to STM32L1XX_XL devices</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_gpio.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">GPIO_Init(): use temporary variable when modifying the registers, to avoid unexpected transition in the GPIO pin configuration<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_tim.c/.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">TIM_EncoderInterfaceConfig(): updated to support TIM9, only for </span><span style="font-size: 10pt; font-family: Verdana;">STM32L1XX_</span><span style="font-size: 10pt; font-family: Verdana;">MDP, </span><span style="font-size: 10pt; font-family: Verdana;">STM32L1XX_</span><span style="font-size: 10pt; font-family: Verdana;">HD and </span><span style="font-size: 10pt; font-family: Verdana;">STM32L1XX_</span><span style="font-size: 10pt; font-family: Verdana;">XL devices</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_opamp.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">OPAMP_OffsetTrimmingModeSelect(): updated to write into OTR register instead of CSR</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_rcc.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IS_RCC_FLAG() macro: delete duplicated RCC_FLAG_WWDGRST and add RCC_FLAG_OBLRST</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_rtc.c</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">RTC_GetSubSecond(): update function header comment<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_rtc.h</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">IS_RTC_GET_FLAG() macro: add test on RTC_FLAG_INITS<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">stm32l1xx_lcd.c<br>
|
||||
</span></li>
|
||||
<ul>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">LCD_WaitForSynchro(): add timeout for polling on FCRSF flag</span></li>
|
||||
</ul>
|
||||
</ul>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: -moz-initial; -moz-background-origin: -moz-initial; -moz-background-inline-policy: -moz-initial; margin-right: 500pt; width: 167px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0 / 22-February-2013<o:p></o:p></span></h3>
|
||||
|
||||
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file misc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the miscellaneous
|
||||
* firmware library functions (add-on to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the ADC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_aes.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the AES firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_comp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the COMP firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_crc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the CRC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dac.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the DAC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dbgmcu.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the DBGMCU
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dma.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the DMA firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_exti.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the EXTI firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_flash.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the FLASH
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -92,8 +92,8 @@ typedef enum
|
|||
* @{
|
||||
*/
|
||||
|
||||
#define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08082FFF))
|
||||
#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0805FFFF))
|
||||
#define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08083FFF))
|
||||
#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF))
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
@ -208,8 +208,52 @@ typedef enum
|
|||
|
||||
#define OB_WRP2_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
|
||||
|
||||
#define OB_WRP3_Pages1536to1551 ((uint32_t)0x00000001) /* Write protection of Sector96 */
|
||||
#define OB_WRP3_Pages1552to1567 ((uint32_t)0x00000002) /* Write protection of Sector97 */
|
||||
#define OB_WRP3_Pages1568to1583 ((uint32_t)0x00000004) /* Write protection of Sector98 */
|
||||
#define OB_WRP3_Pages1584to1599 ((uint32_t)0x00000008) /* Write protection of Sector99 */
|
||||
#define OB_WRP3_Pages1600to1615 ((uint32_t)0x00000010) /* Write protection of Sector100 */
|
||||
#define OB_WRP3_Pages1616to1631 ((uint32_t)0x00000020) /* Write protection of Sector101 */
|
||||
#define OB_WRP3_Pages1632to1647 ((uint32_t)0x00000040) /* Write protection of Sector102 */
|
||||
#define OB_WRP3_Pages1648to1663 ((uint32_t)0x00000080) /* Write protection of Sector103 */
|
||||
#define OB_WRP3_Pages1664to1679 ((uint32_t)0x00000100) /* Write protection of Sector104 */
|
||||
#define OB_WRP3_Pages1680to1695 ((uint32_t)0x00000200) /* Write protection of Sector105 */
|
||||
#define OB_WRP3_Pages1696to1711 ((uint32_t)0x00000400) /* Write protection of Sector106 */
|
||||
#define OB_WRP3_Pages1712to1727 ((uint32_t)0x00000800) /* Write protection of Sector107 */
|
||||
#define OB_WRP3_Pages1728to1743 ((uint32_t)0x00001000) /* Write protection of Sector108 */
|
||||
#define OB_WRP3_Pages1744to1759 ((uint32_t)0x00002000) /* Write protection of Sector109 */
|
||||
#define OB_WRP3_Pages1760to1775 ((uint32_t)0x00004000) /* Write protection of Sector110 */
|
||||
#define OB_WRP3_Pages1776to1791 ((uint32_t)0x00008000) /* Write protection of Sector111 */
|
||||
#define OB_WRP3_Pages1792to1807 ((uint32_t)0x00010000) /* Write protection of Sector112 */
|
||||
#define OB_WRP3_Pages1808to1823 ((uint32_t)0x00020000) /* Write protection of Sector113 */
|
||||
#define OB_WRP3_Pages1824to1839 ((uint32_t)0x00040000) /* Write protection of Sector114 */
|
||||
#define OB_WRP3_Pages1840to1855 ((uint32_t)0x00080000) /* Write protection of Sector115 */
|
||||
#define OB_WRP3_Pages1856to1871 ((uint32_t)0x00100000) /* Write protection of Sector116 */
|
||||
#define OB_WRP3_Pages1872to1887 ((uint32_t)0x00200000) /* Write protection of Sector117 */
|
||||
#define OB_WRP3_Pages1888to1903 ((uint32_t)0x00400000) /* Write protection of Sector118 */
|
||||
#define OB_WRP3_Pages1904to1919 ((uint32_t)0x00800000) /* Write protection of Sector119 */
|
||||
#define OB_WRP3_Pages1920to1935 ((uint32_t)0x01000000) /* Write protection of Sector120 */
|
||||
#define OB_WRP3_Pages1936to1951 ((uint32_t)0x02000000) /* Write protection of Sector121 */
|
||||
#define OB_WRP3_Pages1952to1967 ((uint32_t)0x04000000) /* Write protection of Sector122 */
|
||||
#define OB_WRP3_Pages1968to1983 ((uint32_t)0x08000000) /* Write protection of Sector123 */
|
||||
#define OB_WRP3_Pages1984to1999 ((uint32_t)0x10000000) /* Write protection of Sector124 */
|
||||
#define OB_WRP3_Pages2000to2015 ((uint32_t)0x20000000) /* Write protection of Sector125 */
|
||||
#define OB_WRP3_Pages2016to2031 ((uint32_t)0x40000000) /* Write protection of Sector126 */
|
||||
#define OB_WRP3_Pages2032to2047 ((uint32_t)0x80000000) /* Write protection of Sector127 */
|
||||
|
||||
#define OB_WRP3_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Sectors */
|
||||
|
||||
#define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000))
|
||||
|
||||
/* IMPORTANT NOTE
|
||||
==============
|
||||
In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
- WRPR correspond to WRPR1
|
||||
- WRPR1 correspond to WRPR2
|
||||
- WRPR2 correspond to WRPR3
|
||||
- WRPR3 correspond to WRPR4
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@ -431,6 +475,7 @@ void FLASH_OB_Launch(void);
|
|||
FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
|
||||
FLASH_Status FLASH_OB_WRP1Config(uint32_t OB_WRP1, FunctionalState NewState);
|
||||
FLASH_Status FLASH_OB_WRP2Config(uint32_t OB_WRP2, FunctionalState NewState);
|
||||
FLASH_Status FLASH_OB_WRP3Config(uint32_t OB_WRP3, FunctionalState NewState);
|
||||
FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP);
|
||||
FLASH_Status FLASH_OB_PCROPConfig(uint32_t OB_WRP, FunctionalState NewState);
|
||||
FLASH_Status FLASH_OB_PCROP1Config(uint32_t OB_WRP1, FunctionalState NewState);
|
||||
|
@ -442,6 +487,7 @@ uint8_t FLASH_OB_GetUser(void);
|
|||
uint32_t FLASH_OB_GetWRP(void);
|
||||
uint32_t FLASH_OB_GetWRP1(void);
|
||||
uint32_t FLASH_OB_GetWRP2(void);
|
||||
uint32_t FLASH_OB_GetWRP3(void);
|
||||
FlagStatus FLASH_OB_GetRDP(void);
|
||||
FlagStatus FLASH_OB_GetSPRMOD(void);
|
||||
uint8_t FLASH_OB_GetBOR(void);
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_fsmc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the FSMC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the I2C firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the IWDG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_lcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the LCD firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_opamp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the operational
|
||||
* amplifiers (opamp) firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_pwr.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the PWR firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_rcc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the RCC
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -404,7 +404,7 @@ typedef struct
|
|||
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
|
||||
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
|
||||
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
|
||||
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LSECSS))
|
||||
((FLAG) == RCC_FLAG_OBLRST)|| ((FLAG) == RCC_FLAG_LSECSS))
|
||||
|
||||
#define IS_RCC_HSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
|
||||
#define IS_RCC_MSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x3F)
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_rtc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the RTC firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -744,8 +744,8 @@ typedef struct
|
|||
((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
|
||||
((FLAG) == RTC_FLAG_ALRBWF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
|
||||
((FLAG) == RTC_FLAG_TAMP1F) || ((FLAG) == RTC_FLAG_TAMP2F) || \
|
||||
((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
|
||||
((FLAG) == RTC_FLAG_SHPF))
|
||||
((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
|
||||
((FLAG) == RTC_FLAG_SHPF)|| ((FLAG) == RTC_FLAG_INITS))
|
||||
#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF00DF) == (uint32_t)RESET))
|
||||
|
||||
/**
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_sdio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the SDIO firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_spi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the SPI
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_syscfg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the SYSCFG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_tim.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the TIM firmware
|
||||
* library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -175,7 +175,12 @@ typedef struct
|
|||
((PERIPH) == TIM10) || \
|
||||
((PERIPH) == TIM11))
|
||||
|
||||
|
||||
/* LIST3: TIM2, TIM3, TIM4, TIM5 and TIM9 */
|
||||
#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
|
||||
((PERIPH) == TIM3) || \
|
||||
((PERIPH) == TIM4) || \
|
||||
((PERIPH) == TIM5) || \
|
||||
((PERIPH) == TIM9))
|
||||
|
||||
/** @defgroup TIM_Output_Compare_and_PWM_modes
|
||||
* @{
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_usart.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the USART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_wwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file contains all the functions prototypes for the WWDG
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,14 +2,14 @@
|
|||
******************************************************************************
|
||||
* @file misc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides all the miscellaneous firmware functions (add-on
|
||||
* to CMSIS functions).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_adc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -65,7 +65,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_aes.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the AES peripheral:
|
||||
* + Configuration
|
||||
|
@ -52,7 +52,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_aes_util.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides high level functions to encrypt and decrypt an
|
||||
* input message using AES in ECB/CBC/CTR modes.
|
||||
*
|
||||
|
@ -30,7 +30,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_comp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the comparators (COMP1 and COMP2) peripheral:
|
||||
* + Comparators configuration
|
||||
|
@ -56,7 +56,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_crc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides all the CRC firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dac.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
|
||||
* + DAC channels configuration: trigger, output buffer, data format
|
||||
|
@ -83,7 +83,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,13 +2,13 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dbgmcu.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides all the DBGMCU firmware functions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_dma.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Direct Memory Access controller (DMA):
|
||||
* + Initialization and Configuration
|
||||
|
@ -52,7 +52,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_exti.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the EXTI peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -45,7 +45,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_flash.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides all the Flash firmware functions. These functions
|
||||
* can be executed from Internal FLASH or Internal SRAM memories.
|
||||
* The functions that should be called from SRAM are defined inside
|
||||
|
@ -75,7 +75,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -114,6 +114,9 @@
|
|||
#define WRP67_MASK ((uint32_t)0xFFFF0000)
|
||||
#define WRP89_MASK ((uint32_t)0x0000FFFF)
|
||||
#define WRP1011_MASK ((uint32_t)0xFFFF0000)
|
||||
#define WRP1213_MASK ((uint32_t)0x0000FFFF)
|
||||
#define WRP1415_MASK ((uint32_t)0xFFFF0000)
|
||||
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
@ -497,11 +500,11 @@ void DATA_EEPROM_FixedTimeProgramCmd(FunctionalState NewState)
|
|||
/**
|
||||
* @brief Erase a byte in data memory.
|
||||
* @param Address: specifies the address to be erased.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
|
||||
* density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
|
||||
* STM32L1XX_XL devices.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -530,11 +533,11 @@ FLASH_Status DATA_EEPROM_EraseByte(uint32_t Address)
|
|||
/**
|
||||
* @brief Erase a halfword in data memory.
|
||||
* @param Address: specifies the address to be erased.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
|
||||
* density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
|
||||
* STM32L1XX_XL devices.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -567,7 +570,7 @@ FLASH_Status DATA_EEPROM_EraseHalfWord(uint32_t Address)
|
|||
* if the address to load is the start address of a word (multiple of a word).
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -597,7 +600,7 @@ FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address)
|
|||
* @brief Write a Byte at a specified address in data memory.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @param Address: specifies the address to be written.
|
||||
|
@ -609,7 +612,7 @@ FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address)
|
|||
FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
uint32_t tmp = 0, tmpaddr = 0;
|
||||
#endif
|
||||
|
||||
|
@ -624,7 +627,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
|
|||
/* Clear the FTDW bit */
|
||||
FLASH->PECR &= (uint32_t)(~((uint32_t)FLASH_PECR_FTDW));
|
||||
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
if(Data != (uint8_t)0x00)
|
||||
{
|
||||
/* If the previous operation is completed, proceed to write the new Data */
|
||||
|
@ -642,7 +645,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
|
|||
status = DATA_EEPROM_EraseWord(Address & 0xFFFFFFFC);
|
||||
status = DATA_EEPROM_FastProgramWord((Address & 0xFFFFFFFC), tmp);
|
||||
}
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
|
||||
/* If the previous operation is completed, proceed to write the new Data */
|
||||
*(__IO uint8_t *)Address = Data;
|
||||
|
||||
|
@ -658,7 +661,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
|
|||
* @brief Writes a half word at a specified address in data memory.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @param Address: specifies the address to be written.
|
||||
|
@ -670,7 +673,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
|
|||
FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
uint32_t tmp = 0, tmpaddr = 0;
|
||||
#endif
|
||||
|
||||
|
@ -685,7 +688,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
/* Clear the FTDW bit */
|
||||
FLASH->PECR &= (uint32_t)(~((uint32_t)FLASH_PECR_FTDW));
|
||||
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
if(Data != (uint16_t)0x0000)
|
||||
{
|
||||
/* If the previous operation is completed, proceed to write the new data */
|
||||
|
@ -711,7 +714,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
DATA_EEPROM_FastProgramByte(Address + 1, 0x00);
|
||||
}
|
||||
}
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
|
||||
/* If the previous operation is completed, proceed to write the new data */
|
||||
*(__IO uint16_t *)Address = Data;
|
||||
|
||||
|
@ -727,7 +730,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
* @brief Programs a word at a specified address in data memory.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to the data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @param Address: specifies the address to be written.
|
||||
|
@ -765,7 +768,7 @@ FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data)
|
|||
* @brief Write a Byte at a specified address in data memory without erase.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
|
||||
|
@ -778,7 +781,7 @@ FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data)
|
|||
FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
uint32_t tmp = 0, tmpaddr = 0;
|
||||
#endif
|
||||
|
||||
|
@ -790,7 +793,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
|
|||
|
||||
if(status == FLASH_COMPLETE)
|
||||
{
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
if(Data != (uint8_t) 0x00)
|
||||
{
|
||||
*(__IO uint8_t *)Address = Data;
|
||||
|
@ -808,7 +811,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
|
|||
status = DATA_EEPROM_EraseWord(Address & 0xFFFFFFFC);
|
||||
status = DATA_EEPROM_FastProgramWord((Address & 0xFFFFFFFC), tmp);
|
||||
}
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
|
||||
*(__IO uint8_t *)Address = Data;
|
||||
|
||||
/* Wait for last operation to be completed */
|
||||
|
@ -823,7 +826,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
|
|||
* @brief Writes a half word at a specified address in data memory without erase.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
|
||||
|
@ -836,7 +839,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
|
|||
FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
uint32_t tmp = 0, tmpaddr = 0;
|
||||
#endif
|
||||
|
||||
|
@ -848,7 +851,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
|
||||
if(status == FLASH_COMPLETE)
|
||||
{
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
|
||||
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
|
||||
if(Data != (uint16_t)0x0000)
|
||||
{
|
||||
*(__IO uint16_t *)Address = Data;
|
||||
|
@ -873,7 +876,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
DATA_EEPROM_FastProgramByte(Address + 1, 0x00);
|
||||
}
|
||||
}
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
|
||||
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
|
||||
*(__IO uint16_t *)Address = Data;
|
||||
|
||||
/* Wait for last operation to be completed */
|
||||
|
@ -888,7 +891,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
|
|||
* @brief Programs a word at a specified address in data memory without erase.
|
||||
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
|
||||
* must be called before.
|
||||
* Call the DATA_EEPROM_Lock() to he data EEPROM access
|
||||
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
|
||||
* and Flash program erase control register access(recommended to protect
|
||||
* the DATA_EEPROM against possible unwanted operation).
|
||||
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
|
||||
|
@ -1034,6 +1037,8 @@ void FLASH_OB_Launch(void)
|
|||
* This parameter can be:
|
||||
* @arg value between OB_WRP_Pages0to15 and OB_WRP_Pages496to511
|
||||
* @arg OB_WRP_AllPages
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR correspond to WRPR1
|
||||
* @param NewState: new state of the specified FLASH Pages Wtite protection.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -1087,12 +1092,14 @@ FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
|
|||
|
||||
/**
|
||||
* @brief Write protects the desired pages of the second 128KB of the Flash.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
|
||||
* density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
|
||||
* STM32L1XX_XL devices.
|
||||
* @param OB_WRP1: specifies the address of the pages to be write protected.
|
||||
* This parameter can be:
|
||||
* @arg value between OB_WRP_Pages512to527 and OB_WRP_Pages1008to1023
|
||||
* @arg OB_WRP_AllPages
|
||||
* @arg OB_WRP1_AllPages
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR1 correspond to WRPR2
|
||||
* @param NewState: new state of the specified FLASH Pages Wtite protection.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -1146,11 +1153,13 @@ FLASH_Status FLASH_OB_WRP1Config(uint32_t OB_WRP1, FunctionalState NewState)
|
|||
|
||||
/**
|
||||
* @brief Write protects the desired pages of the third 128KB of the Flash.
|
||||
* @note This function can be used only for STM32L1XX_HD density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
|
||||
* @param OB_WRP2: specifies the address of the pages to be write protected.
|
||||
* This parameter can be:
|
||||
* @arg value between OB_WRP_Pages1024to1039 and OB_WRP_Pages1520to1535
|
||||
* @arg OB_WRP_AllPages
|
||||
* @arg OB_WRP2_AllPages
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR2 correspond to WRPR3
|
||||
* @param NewState: new state of the specified FLASH Pages Wtite protection.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -1202,6 +1211,66 @@ FLASH_Status FLASH_OB_WRP2Config(uint32_t OB_WRP2, FunctionalState NewState)
|
|||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Write protects the desired pages of the fourth 128KB of the Flash.
|
||||
* @note This function can be used only for STM32L1XX_XL devices.
|
||||
* @param OB_WRP3: specifies the address of the pages to be write protected.
|
||||
* This parameter can be:
|
||||
* @arg value between OB_WRP3_Pages1536to1551 and OB_WRP3_Pages2032to2047
|
||||
* @arg OB_WRP3_AllPages
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR3 correspond to WRPR4
|
||||
* @param NewState: new state of the specified FLASH Pages Wtite protection.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
* FLASH_ERROR_PROGRAM, FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
|
||||
*/
|
||||
FLASH_Status FLASH_OB_WRP3Config(uint32_t OB_WRP3, FunctionalState NewState)
|
||||
{
|
||||
uint32_t WRP1213_Data = 0, WRP1415_Data = 0;
|
||||
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
uint32_t tmp1 = 0, tmp2 = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_OB_WRP(OB_WRP3));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
/* Wait for last operation to be completed */
|
||||
status = FLASH_WaitForLastOperation(FLASH_ER_PRG_TIMEOUT);
|
||||
|
||||
if(status == FLASH_COMPLETE)
|
||||
{
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
WRP1213_Data = (uint16_t)(((OB_WRP3 & WRP1213_MASK) | OB->WRP1213));
|
||||
WRP1415_Data = (uint16_t)((((OB_WRP3 & WRP1415_MASK)>>16 | OB->WRP1415)));
|
||||
tmp1 = (uint32_t)(~(WRP1213_Data) << 16)|(WRP1213_Data);
|
||||
OB->WRP1213 = tmp1;
|
||||
|
||||
tmp2 = (uint32_t)(~(WRP1415_Data) << 16)|(WRP1415_Data);
|
||||
OB->WRP1415 = tmp2;
|
||||
}
|
||||
|
||||
else
|
||||
{
|
||||
WRP1213_Data = (uint16_t)(~OB_WRP3 & (WRP1213_MASK & OB->WRP1213));
|
||||
WRP1415_Data = (uint16_t)((((~OB_WRP3 & WRP1415_MASK)>>16 & OB->WRP1415)));
|
||||
|
||||
tmp1 = (uint32_t)((~WRP1213_Data) << 16)|(WRP1213_Data);
|
||||
OB->WRP1213 = tmp1;
|
||||
|
||||
tmp2 = (uint32_t)((~WRP1415_Data) << 16)|(WRP1415_Data);
|
||||
OB->WRP1415 = tmp2;
|
||||
}
|
||||
/* Wait for last operation to be completed */
|
||||
status = FLASH_WaitForLastOperation(FLASH_ER_PRG_TIMEOUT);
|
||||
}
|
||||
|
||||
/* Return the write protection operation Status */
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the read out protection.
|
||||
* @note To correctly run this function, the FLASH_OB_Unlock() function
|
||||
|
@ -1220,7 +1289,7 @@ FLASH_Status FLASH_OB_WRP2Config(uint32_t OB_WRP2, FunctionalState NewState)
|
|||
FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP)
|
||||
{
|
||||
FLASH_Status status = FLASH_COMPLETE;
|
||||
uint8_t tmp1 = 0;
|
||||
uint16_t tmp1 = 0;
|
||||
uint32_t tmp2 = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
|
@ -1228,8 +1297,8 @@ FLASH_Status FLASH_OB_RDPConfig(uint8_t OB_RDP)
|
|||
status = FLASH_WaitForLastOperation(FLASH_ER_PRG_TIMEOUT);
|
||||
|
||||
/* calculate the option byte to write */
|
||||
tmp1 = (uint8_t)(~(OB_RDP ));
|
||||
tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16)) | ((uint32_t)OB_RDP));
|
||||
tmp1 = ((uint16_t)(*(__IO uint16_t *)(OB_BASE)) & 0xFF00) | OB_RDP;
|
||||
tmp2 = (uint32_t)(((uint32_t)((uint32_t)(~tmp1) << 16)) | ((uint32_t)tmp1));
|
||||
|
||||
if(status == FLASH_COMPLETE)
|
||||
{
|
||||
|
@ -1509,7 +1578,7 @@ FLASH_Status FLASH_OB_BORConfig(uint8_t OB_BOR)
|
|||
|
||||
/**
|
||||
* @brief Configures to boot from Bank1 or Bank2.
|
||||
* @note This function can be used only for STM32L1XX_HD density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
|
||||
* @param OB_BOOT: select the FLASH Bank to boot from.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg OB_BOOT_BANK2: At startup, if boot pins are set in boot from user Flash
|
||||
|
@ -1569,6 +1638,8 @@ uint8_t FLASH_OB_GetUser(void)
|
|||
|
||||
/**
|
||||
* @brief Returns the FLASH Write Protection Option Bytes value.
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR correspond to WRPR1
|
||||
* @param None
|
||||
* @retval The FLASH Write Protection Option Bytes value.
|
||||
*/
|
||||
|
@ -1580,8 +1651,10 @@ uint32_t FLASH_OB_GetWRP(void)
|
|||
|
||||
/**
|
||||
* @brief Returns the FLASH Write Protection Option Bytes value.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
|
||||
* density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
|
||||
* STM32L1XX_XL devices.
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR1 correspond to WRPR2
|
||||
* @param None
|
||||
* @retval The FLASH Write Protection Option Bytes value.
|
||||
*/
|
||||
|
@ -1593,7 +1666,9 @@ uint32_t FLASH_OB_GetWRP1(void)
|
|||
|
||||
/**
|
||||
* @brief Returns the FLASH Write Protection Option Bytes value.
|
||||
* @note This function can be used only for STM32L1XX_HD density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR2 correspond to WRPR3
|
||||
* @param None
|
||||
* @retval The FLASH Write Protection Option Bytes value.
|
||||
*/
|
||||
|
@ -1603,6 +1678,20 @@ uint32_t FLASH_OB_GetWRP2(void)
|
|||
return (uint32_t)(FLASH->WRPR2);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the FLASH Write Protection Option Bytes value.
|
||||
* @note This function can be used only for STM32L1XX_XL devices.
|
||||
* @note In the StdLib, the naming of WRP registers is shifted vs. the Reference Manual:
|
||||
* - WRPR3 correspond to WRPR4
|
||||
* @param None
|
||||
* @retval The FLASH Write Protection Option Bytes value.
|
||||
*/
|
||||
uint32_t FLASH_OB_GetWRP3(void)
|
||||
{
|
||||
/* Return the FLASH write protection Register value */
|
||||
return (uint32_t)(FLASH->WRPR3);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the FLASH Read out Protection Status is set or not.
|
||||
* @param None
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_flash_ramfunc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides all the Flash firmware functions which should be
|
||||
* executed from the internal SRAM. This file should be placed in
|
||||
* internal SRAM.
|
||||
|
@ -39,7 +39,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -140,17 +140,19 @@ __RAM_FUNC FLASH_RUNPowerDownCmd(FunctionalState NewState)
|
|||
|
||||
/**
|
||||
* @brief Erases a specified 2 page in program memory in parallel.
|
||||
* @note This function can be used only for STM32L1XX_HD density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
|
||||
* To correctly run this function, the FLASH_Unlock() function
|
||||
* must be called before.
|
||||
* Call the FLASH_Lock() to disable the flash memory access
|
||||
* (recommended to protect the FLASH memory against possible unwanted operation).
|
||||
* @param Page_Address1: The page address in program memory to be erased in
|
||||
* the first Bank (BANK1). This parameter should be between 0x08000000
|
||||
* and 0x0802FF00.
|
||||
* the first Bank (BANK1). This parameter should be:
|
||||
* - between 0x08000000 and 0x0802FF00 for STM32L1XX_HD devices
|
||||
* - between 0x08000000 and 0x0803FF00 for STM32L1XX_XL devices
|
||||
* @param Page_Address2: The page address in program memory to be erased in
|
||||
* the second Bank (BANK2). This parameter should be between 0x08030000
|
||||
* and 0x0805FF00.
|
||||
* the second Bank (BANK2). This parameter should be:
|
||||
* - between 0x08030000 and 0x0805FF00 for STM32L1XX_HD devices
|
||||
* - between 0x08040000 and 0x0807FF00 for STM32L1XX_XL devices
|
||||
* @note A Page is erased in the Program memory only if the address to load
|
||||
* is the start address of a page (multiple of 256 bytes).
|
||||
* @retval FLASH Status: The returned value can be:
|
||||
|
@ -262,14 +264,18 @@ __RAM_FUNC FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer)
|
|||
/**
|
||||
* @brief Programs 2 half page in program memory in parallel.
|
||||
* @param Address1: specifies the first address to be written in the first bank
|
||||
* (BANK1). This parameter should be between 0x08000000 and 0x0802FF80.
|
||||
* (BANK1).This parameter should be:
|
||||
* - between 0x08000000 and 0x0802FF80 for STM32L1XX_HD devices
|
||||
* - between 0x08000000 and 0x0803FF80 for STM32L1XX_XL devices
|
||||
* @param pBuffer1: pointer to the buffer containing the data to be written
|
||||
* to the first half page in the first bank.
|
||||
* @param Address2: specifies the second address to be written in the second bank
|
||||
* (BANK2). This parameter should be between 0x08030000 and 0x0805FF80.
|
||||
* (BANK2). This parameter should be:
|
||||
* - between 0x08030000 and 0x0805FF80 for STM32L1XX_HD devices
|
||||
* - between 0x08040000 and 0x0807FF80 for STM32L1XX_XL devices
|
||||
* @param pBuffer2: pointer to the buffer containing the data to be written
|
||||
* to the second half page in the second bank.
|
||||
* @note This function can be used only for STM32L1XX_HD density devices.
|
||||
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
|
||||
* @note To correctly run this function, the FLASH_Unlock() function
|
||||
* must be called before.
|
||||
* Call the FLASH_Lock() to disable the flash memory access
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_fsmc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the FSMC peripheral:
|
||||
* + Initialization
|
||||
|
@ -12,7 +12,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the GPIO peripheral:
|
||||
* + Initialization and Configuration
|
||||
|
@ -55,7 +55,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -179,6 +179,7 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
|||
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
||||
{
|
||||
uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
|
||||
uint32_t tmpreg = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
@ -197,30 +198,42 @@ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
|||
|
||||
if (currentpin == pos)
|
||||
{
|
||||
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
|
||||
|
||||
GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
|
||||
/* Use temporary variable to update MODER register configuration, to avoid
|
||||
unexpected transition in the GPIO pin configuration. */
|
||||
tmpreg = GPIOx->MODER;
|
||||
tmpreg &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
|
||||
tmpreg |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
|
||||
GPIOx->MODER = tmpreg;
|
||||
|
||||
if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
|
||||
{
|
||||
/* Check Speed mode parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
|
||||
/* Speed mode configuration */
|
||||
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
|
||||
GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
|
||||
/* Use temporary variable to update OSPEEDR register configuration, to avoid
|
||||
unexpected transition in the GPIO pin configuration. */
|
||||
tmpreg = GPIOx->OSPEEDR;
|
||||
tmpreg &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
|
||||
tmpreg |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
|
||||
GPIOx->OSPEEDR = tmpreg;
|
||||
|
||||
/*Check Output mode parameters */
|
||||
assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
|
||||
|
||||
/* Output mode configuration */
|
||||
GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ;
|
||||
GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
|
||||
/* Use temporary variable to update OTYPER register configuration, to avoid
|
||||
unexpected transition in the GPIO pin configuration. */
|
||||
tmpreg = GPIOx->OTYPER;
|
||||
tmpreg &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos));
|
||||
tmpreg |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
|
||||
GPIOx->OTYPER = tmpreg;
|
||||
}
|
||||
|
||||
/* Pull-up Pull down resistor configuration */
|
||||
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
|
||||
GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
|
||||
/* Use temporary variable to update PUPDR register configuration, to avoid
|
||||
unexpected transition in the GPIO pin configuration. */
|
||||
tmpreg = GPIOx->PUPDR;
|
||||
tmpreg &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
|
||||
tmpreg |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
|
||||
GPIOx->PUPDR = tmpreg;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_i2c.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Inter-integrated circuit (I2C)
|
||||
* + Initialization and Configuration
|
||||
|
@ -57,7 +57,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_iwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Independent watchdog (IWDG) peripheral:
|
||||
* + Prescaler and Counter configuration
|
||||
|
@ -64,7 +64,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_lcd.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the LCD controller (LCD) peripheral:
|
||||
* + Initialization and configuration
|
||||
|
@ -61,7 +61,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -129,6 +129,8 @@
|
|||
#define BLINK_MASK ((uint32_t)0xFFFC1FFF) /* LCD BLINK Mask */
|
||||
#define CONTRAST_MASK ((uint32_t)0xFFFFE3FF) /* LCD CONTRAST Mask */
|
||||
|
||||
#define SYNCHRO_TIMEOUT ((uint32_t) 0x00008000)
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
|
@ -236,10 +238,15 @@ void LCD_Cmd(FunctionalState NewState)
|
|||
*/
|
||||
void LCD_WaitForSynchro(void)
|
||||
{
|
||||
uint32_t synchrocounter = 0;
|
||||
uint32_t synchrostatus = 0x00;
|
||||
|
||||
/* Loop until FCRSF flag is set */
|
||||
while ((LCD->SR & LCD_FLAG_FCRSF) == (uint32_t)RESET)
|
||||
do
|
||||
{
|
||||
}
|
||||
synchrostatus = LCD->SR & LCD_FLAG_FCRSF;
|
||||
synchrocounter++;
|
||||
} while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_opamp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the operational amplifiers (opamp) peripheral:
|
||||
* + Initialization and configuration
|
||||
|
@ -44,7 +44,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -276,10 +276,10 @@ void OPAMP_OffsetTrimmingModeSelect(uint32_t OPAMP_Trimming)
|
|||
assert_param(IS_OPAMP_TRIMMING(OPAMP_Trimming));
|
||||
|
||||
/* Reset the OPAMP_OTR range bit */
|
||||
OPAMP->CSR &= (~(uint32_t) (OPAMP_OTR_OT_USER));
|
||||
OPAMP->OTR &= (~(uint32_t) (OPAMP_OTR_OT_USER));
|
||||
|
||||
/* Select the OPAMP offset trimming */
|
||||
OPAMP->CSR |= OPAMP_Trimming;
|
||||
OPAMP->OTR |= OPAMP_Trimming;
|
||||
|
||||
}
|
||||
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_pwr.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Power Controller (PWR) peripheral:
|
||||
* + RTC Domain Access
|
||||
|
@ -17,7 +17,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -650,7 +650,9 @@ void PWR_EnterSleepMode(uint32_t PWR_Regulator, uint8_t PWR_SLEEPEntry)
|
|||
else
|
||||
{
|
||||
/* Request Wait For Event */
|
||||
__SEV();
|
||||
__WFE();
|
||||
__WFE();
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -713,17 +715,17 @@ void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
|
|||
/**
|
||||
* @brief Enters STANDBY mode.
|
||||
* @note In Standby mode, all I/O pins are high impedance except for:
|
||||
* Reset pad (still available)
|
||||
* RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
|
||||
* time-stamp, RTC Alarm out, or RTC clock calibration out.
|
||||
* WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled.
|
||||
* - Reset pad (still available)
|
||||
* - RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
|
||||
* time-stamp, RTC Alarm out, or RTC clock calibration out.
|
||||
* - WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled.
|
||||
* @note Wakeup flag (WUF) need to be cleared at application level before to
|
||||
* call this function.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PWR_EnterSTANDBYMode(void)
|
||||
{
|
||||
/* Clear Wakeup flag */
|
||||
PWR->CR |= PWR_CR_CWUF;
|
||||
|
||||
/* Select STANDBY mode */
|
||||
PWR->CR |= PWR_CR_PDDS;
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_rcc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Reset and clock control (RCC) peripheral:
|
||||
* + Internal/external clocks, PLL, CSS and MCO configuration
|
||||
|
@ -38,7 +38,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -431,6 +431,8 @@ void RCC_HSICmd(FunctionalState NewState)
|
|||
* domain after reset, you have to enable write access using
|
||||
* PWR_RTCAccessCmd(ENABLE) function before to configure the LSE
|
||||
* (to be done once after reset).
|
||||
* @note Care must be taken when using this function to configure LSE mode
|
||||
* as it clears systematically the LSEON bit before any new configuration.
|
||||
* @note After enabling the LSE (RCC_LSE_ON or RCC_LSE_Bypass), the application
|
||||
* software should wait on LSERDY flag to be set indicating that LSE clock
|
||||
* is stable and can be used to clock the RTC.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_rtc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Real-Time Clock (RTC) peripheral:
|
||||
* + Initialization
|
||||
|
@ -204,7 +204,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -851,8 +851,6 @@ void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct)
|
|||
|
||||
/**
|
||||
* @brief Gets the RTC current Calendar Subseconds value.
|
||||
* @note This function freeze the Time and Date registers after reading the
|
||||
* SSR register.
|
||||
* @param None
|
||||
* @retval RTC current Calendar Subseconds value.
|
||||
*/
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_sdio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the SDIO peripheral:
|
||||
* + Initialization
|
||||
|
@ -109,7 +109,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_spi.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Serial peripheral interface (SPI):
|
||||
* + Initialization and Configuration
|
||||
|
@ -75,7 +75,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_syscfg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the SYSCFG and RI peripherals:
|
||||
* + SYSCFG Initialization and Configuration
|
||||
|
@ -49,7 +49,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_tim.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the TIM peripheral:
|
||||
* + TimeBase management
|
||||
|
@ -89,7 +89,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
@ -2540,7 +2540,9 @@ void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM
|
|||
|
||||
/**
|
||||
* @brief Configures the TIMx Encoder Interface.
|
||||
* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
|
||||
* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
|
||||
* @note TIM9 is supporting Encoder Interface only in STM32L1XX_MDP, STM32L1XX_HD
|
||||
* and STM32L1XX_XL devices.
|
||||
* @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
|
||||
|
@ -2565,7 +2567,7 @@ void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
|
|||
uint16_t tmpccer = 0;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_TIM_LIST3_PERIPH(TIMx));
|
||||
assert_param(IS_TIM_LIST7_PERIPH(TIMx));
|
||||
assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
|
||||
assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
|
||||
assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_usart.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Universal synchronous asynchronous receiver
|
||||
* transmitter (USART):
|
||||
|
@ -58,7 +58,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32l1xx_wwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.2.0
|
||||
* @date 22-February-2013
|
||||
* @version V1.3.1
|
||||
* @date 20-April-2015
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Window watchdog (WWDG) peripheral:
|
||||
* + Prescaler, Refresh window and Counter configuration
|
||||
|
@ -65,7 +65,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
|
|
Loading…
Reference in New Issue